TPS7A4501-SP Low-Dropout Voltage Regulator
- SLVSC31D December 2013 – August 2015 TPS7A4501-SP
  
  PRODUCTION DATA.

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DATA SHEET

TPS7A4501-SP Low-Dropout Voltage Regulator

1 Features

QMLV Qualified SMD 5962-12224
Adjustable Output from 1.21 to 20 V
Optimized for Fast-Transient Response
High Output Voltage Accuracy: 1.15% at 25°C (Typical)
Dropout Voltage: 200 mV With I_LOAD = 750 mA (Typical)
Low Noise: 50 μV_RMS (10 Hz to 100 kHz) for V_OUT = 5 V
High Ripple Rejection: 68 dB at 1 kHz
1-mA Quiescent Current
No Protection Diodes Needed
Stable With Ceramic Output Capacitor
Reverse-Battery Protection
Reverse Current Protection
5962-1222402VHA:
- Wide Vin 2.3 to 20 V
- Output Current: 750 mA
5962R1222403VXC:
- Wide Vin 2.9 to 20 V
- Output Current: 1.5 A
- Thermally-Enhanced HKU Package
- Radiation Hardness Assurance (RHA) up to Total Ionizing Dose (TID) 100 krad (Si)
- Exhibits Low Dose Rate Sensitivity But Remains Within the Pre-Radiation Electrical Limits at 100 krad Total Dose Level, as Allowed by MIL-STD-883, TM1019

2 Applications

RF Components VCOs, Receivers, ADCs, Amplifiers and Clock Distributions
Clean Analog Supply Requirements
Available in Military (–55°C to 125°C) Temperature Range
Engineering Evaluation (/EM) Samples are Available ⁽¹⁾

(1) These units are intended for engineering evaluation only. They are processed to a non-compliant flow (for example, no burn-in, and so forth) and are tested to a temperature rating of 25°C only. These units are not suitable for qualification, production, radiation testing or flight use. Parts are not specified for performance over the full MIL specified temperature range of –55°C to 125°C or operating life.

3 Description

The TPS7A4501-SP is a low-dropout (LDO) regulator optimized for fast-transient response. The 5962-1222402VHA can supply 750 mA of output current with a dropout voltage of 300 mV. The 5962R1222403VXC can supply 1.5 A of output current with a dropout voltage of 320 mV. Quiescent current is well controlled; it does not rise in dropout, as with many other regulators. In addition to fast transient response, the TPS7A4501-SP regulator has very-low output noise, which makes it ideal for sensitive RF supply applications.

Device Information⁽¹⁾

PART NUMBER	PACKAGE	BODY SIZE (NOM)
TPS7A4501-SP	CFP [U] (10)	6.35 mm × 6.35 mm
	CFP [HKU] (10)	7.02 mm × 6.86 mm
	KGD	N/A⁽²⁾

For all available packages, see the orderable addendum at the end of the data sheet.
Bare die in waffle pack

SPACE

Dropout Voltage vs Temperature

V_ADJ Radiation Drift Curve

4 Revision History

Changes from C Revision (October 2014) to D Revision

Replaced the Dissipation Ratings table with the Thermal Information tableGo
Added 5962-1222402V9A to Electrical Characteristics (5962-1222402VHA and 5962-1222402V9A)Go
Added new part 5962R1222403V9A to Electrical Characteristics (5962R1222403VXC and 5962R1222403V9A)Go

Changes from B Revision (October 2014) to C Revision

Removed V_DO, dropout voltage with test condition V_OUT = 2.4 VGo
Added thermal shutdown temperature Go
Added thermal shutdown temperature Go
Added thermal shutdown information to Protection FeaturesGo

Changes from A Revision (January 2014) to B Revision

Added limits for the new device type, 5962R1222Go
Added Handling Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Go
Added thermal information for the HKU package Go

Changes from * Revision (December 2013) to A Revision

Changed Product Status from Product Preview to Production DataGo

5 Description (continued)

Output voltage range is from 1.21 to 20 V. The TPS7A4501-SP is stable with output capacitance as low as 10 μF. Small ceramic capacitors can be used without the necessary addition of ESR, as is common with other regulators. Internal protection circuitry includes reverse-battery protection, current limiting, thermal limiting, and reverse-current protection. The device is available as an adjustable device with a 1.21-V reference voltage. The 5962-1222402VHA is available in 10-pin CFP (U) package and 5962R1222403VXC is available in thermally-enhanced 10-pin CFP (HKU) package. Known good die (KGD) option is available for both 5962-1222402V9A for non-RHA version and 5962R1222403V9A for RHA.

6 Pin Configuration and Functions

U Package

10-Pin CFP

Top View

HKU Package

10-Pin CFP

Top View

Pin Functions

PIN		I/O	DESCRIPTION
NAME	NO.	I/O	DESCRIPTION
SHDN	1	I	Shutdown. SHDN is used to put the TPS7A4501 regulator into a low-power shutdown state. The output is off when SHDN is pulled low. SHDN can be driven by 5-V logic, 3-V logic, or open-collector logic with a pullup resistor. The pullup resistor is required to supply the pullup current of the open-collector gate, normally several microamperes, and SHDN current, typically 3 μA. If unused, the user must connect SHDN to V_IN. The device is in the low-power shutdown state if SHDN is not connected.
IN	2	I	Input. Power is supplied to the device through IN. A bypass capacitor is required on this pin if the device is more than six inches away from the main input filter capacitor. In general, the output impedance of a battery rises with frequency, so it is advisable to include a bypass capacitor in battery-powered circuits. A bypass capacitor (ceramic) in the range of 1 to 10 μF is sufficient. The TPS7A4501 regulator is designed to withstand reverse voltages on IN with respect to ground and on OUT. In the case of a reverse input, which can happen if a battery is plugged in backwards, the device functions as if there is a diode in series with its input. No reverse current flows into the regulator, and no reverse voltage appears at the load. The device protects both itself and the load.
	3
	4
NC	5	NC	This pin is not connected to any internal circuitry. It can be left floating or tied to VIN or GND.
OUT	6	O	Output. The output supplies power to the load. To prevent oscillations, use a minimum output capacitor (ceramic) of 10 μF. Applications with large transient loads to limit peak voltage transients require larger output capacitors.
	7
	8
ADJ	9	I	Adjust. This is the input to the error amplifier. ADJ is internally clamped to ±7 V. It has a bias current of 3 μA that flows into the pin. ADJ voltage is 1.21 V referenced to ground, and the output voltage range is 1.21 to 20 V.
GND	10	—	Ground
Thermal Vias⁽¹⁾	—	—	The exposed thermal vias of the HKU package should be connected to a wide ground plane for effective heat dissipation. Refer to Figure 30 and Figure 31 for the typical footprint of the HKU package.

(1) For HKU package

Bare Die Information

DIE THICKNESS	BACKSIDE FINISH	BACKSIDE POTENTIAL	BOND PAD METALLIZATION COMPOSITION	BOND PAD THICKNESS
15 mils	Silicon with backgrind	Floating	TiW/AlCu2	1627 nm

Bond Pad Coordinates in Microns⁽¹⁾

DESCRIPTION	PAD NUMBER	X MIN	Y MIN	X MAX	Y MAX
SHDN	1	1729.25	55.5	1879.25	205.5
IN	2	1037.25	875	1187.25	1025
IN	3	1460.75	1255.5	1610.75	1405.5
IN	4	1037.75	1384.5	1187.75	1534.5
OUT	5	774.25	1634.75	924.25	1784.75
OUT	6	675.25	1166	825.25	1316
OUT	7	345.5	1299.25	495.5	1449.25
SENSE/ADJ	8	55.5	213	205.5	363
GND	9	244	17.5	394	167.5

(1) Substrate is not to be connected.

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature (unless otherwise noted) ⁽¹⁾

			MIN	MAX	UNIT
V_IN	Input voltage	IN	–22	22	V
		OUT	–22	22
		Input-to-output differential⁽²⁾	–22	22
		ADJ	–7	7
		SHDN	–22	22
T_lead	Maximum lead temperature (10-s soldering time)			260	°C
T_J	Maximum operating junction temperature			150	°C
T_stg	Storage temperature		–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) Absolute maximum input-to-output differential voltage cannot be achieved with all combinations of rated IN pin and OUT pin voltages. With the IN pin at 22 V, the OUT pin may not be pulled below 0 V. The total measured voltage from IN to OUT can not exceed ±22 V.

7.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins⁽¹⁾	4000	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

over operating junction temperature range (unless otherwise noted)

		MIN	NOM	MAX	UNIT
T_J	Operating junction temperature	–55		125	°C

7.4 Thermal Information

THERMAL METRIC⁽¹⁾		TPS7A4501-SP		UNIT
		U (CFP)	HKU (CFP)
		10 PINS	10 PINS
R_θJA	Junction-to-ambient thermal resistance	86.6	51.9	°C/W
R_θJC(bot)	Junction-to-case (bottom) thermal resistance⁽²⁾	10.3	6.6	°C/W
R_θJB	Junction-to-board thermal resistance	35.6	31.5	°C/W
ψ_JT	Junction-to-top characterization parameter	31.7	5.42	°C/W
ψ_JB	Junction-to-board characterization parameter	53.5	31	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

(2) The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.

7.5 Electrical Characteristics (5962-1222402VHA and 5962-1222402V9A)

over operating junction temperature range T_J = –55°C to 125°C (unless otherwise noted)

PARAMETER		TEST CONDITIONS	T_J	MIN	TYP⁽⁹⁾	MAX	UNIT
V_IN	Minimum input voltage⁽¹⁾⁽²⁾	I_LOAD = 500 mA	25°C		1.9	2.3	V
V_IN	Minimum input voltage⁽¹⁾⁽²⁾	I_LOAD = 750 mA	Full range		2.1	2.5	V
V_ADJ	ADJ pin voltage⁽¹⁾⁽³⁾	V_IN = 2.21 V, I_LOAD = 1 mA	25°C	1.196	1.21	1.224	V
V_ADJ	ADJ pin voltage⁽¹⁾⁽³⁾	V_IN = 2.5 to 20 V, I_LOAD = 1 to 750 mA	Full range	1.174	1.21	1.246	V
	Line regulation⁽¹⁾	ΔV_IN = 2.21 to 20 V, I_LOAD = 1 mA	Full range		1.5	4.5	mV
	Load regulation⁽¹⁾	V_IN = 2.5 V, ΔI_LOAD = 1 to 750 mA	25°C		2	8	mV
	Load regulation⁽¹⁾	V_IN = 2.5 V, ΔI_LOAD = 1 to 750 mA	Full range			18	mV
V_DO	Dropout voltage (V_OUT = 2.4 V) ⁽⁵⁾⁽⁴⁾	I_LOAD = 1 mA	25°C		0.02	0.05	V
		I_LOAD = 1 mA	Full range			0.07
		I_LOAD = 100 mA	25°C		0.085	0.10
		I_LOAD = 100 mA	Full range			0.13
		I_LOAD = 500 mA	25°C		0.17	0.21
		I_LOAD = 500 mA	Full range			0.27
		I_LOAD = 750 mA	25°C		0.20	0.27
		I_LOAD = 750 mA	Full range			0.33
I_GND	GND pin current⁽⁴⁾⁽⁶⁾ V_IN = 2.5 V	I_LOAD = 0 mA,	Full range		1	1.5	mA
		I_LOAD = 1 mA	Full range		1.1	1.6
		I_LOAD = 100 mA	Full range		3.3	7
		I_LOAD = 500 mA	Full range		15	30
		I_LOAD = 750 mA	Full range		28	45
e_N⁽¹¹⁾	Output voltage noise	C_OUT = 22 μF, I_LOAD = 750 mA, V_IN = 7 V, V_OUT= 5 V B_W = 10 Hz to 100 kHz	25°C		50		μV_RMS
I_ADJ	ADJ pin bias current⁽¹⁾⁽⁷⁾		25°C		3	7	μA
	Shutdown threshold	V_OUT = OFF to ON	Full range		0.9	2	V
	Shutdown threshold	V_OUT = ON to OFF	Full range	0.15	0.75		V
I_SHDN	SHDN pin current	V_SHDN = 0 V	25°C		0.01	1	μA
I_SHDN	SHDN pin current	V_SHDN = 20 V	25°C		3	20	μA
	Quiescent current in shutdown	V_IN = 6 V, V_SHDN = 0 V	25°C		0.01	1	μA
	Ripple rejection⁽¹⁰⁾	V_IN – V_OUT = 1.5 V (avg), V_RIPPLE = 0.5 V_P-P, ƒ_RIPPLE = 120 Hz, I_LOAD = 0.75 A	25°C	60	68		dB
I_LIMIT	Current limit⁽¹⁰⁾	V_IN = 7 V, V_OUT = 0 V	25°C	1.7	1.9		A
I_LIMIT	Current limit⁽¹⁰⁾	V_IN = 2.5 V	Full range	1.6	1.9		A
I_IL	Input reverse leakage current	V_IN = –20 V, V_OUT = 0 V	Full range			300	μA
I_RO	Reverse output current⁽⁸⁾	V_OUT = 1.21 V, V_IN < 1.21 V	25°C		300	500	μA
TSD	Thermal shutdown temperature				175		°C

(1) The TPS7A4501 is tested and specified for these conditions with the ADJ pin connected to the OUT pin.

(2) Dropout voltages are limited by the minimum input voltage specification under some output voltage/load conditions.

(3) Operating conditions are limited by maximum junction temperature. The regulated output voltage specification does not apply for all possible combinations of input voltage and output current. When operating at maximum input voltage, limit the output current range. When operating at maximum output current, limit the input voltage range.

(4) To satisfy requirements for minimum input voltage, the TPS7A4501 is tested and specified for these conditions with an external resistor divider (two 4.12-kΩ resistors) for an output voltage of 2.4 V. The external resistor divider adds a 300-µA DC load on the output.

(5) Dropout voltage is the minimum input-to-output voltage differential needed to maintain regulation at a specified output current. In dropout, the output voltage is equal to: V_IN – V_DROPOUT.

(6) GND pin current is tested with V_IN = 2.5 V and a current source load. The GND pin current decreases at higher input voltages.

(7) ADJ pin bias current flows into the ADJ pin.

(8) Reverse output current is tested with the IN pin grounded and the OUT pin forced to the rated output voltage. This current flows into the OUT pin and out the GND pin.

(9) Typical values represent the likely parametric nominal values determined at the time of characterization. Typical values depend on the application and configuration and may vary over time. Typical values are not ensured on production material.

(10) Parameter is specified by characterization for KGD and is not tested in production.

(11) Parameter is specified by bench characterization and is not tested in production.

7.6 Electrical Characteristics (5962R1222403VXC and 5962R1222403V9A)

Over operating junction temperature range T_J = –55°C to 125°C (unless otherwise noted)

PARAMETER		TEST CONDITIONS	T_J	MIN	TYP⁽¹⁰⁾	MAX	UNIT
V_IN	Minimum input voltage⁽¹⁾⁽²⁾	I_LOAD = 1.5 A	Full range		2.1	2.9	V
V_ADJ	ADJ pin voltage⁽¹⁾⁽³⁾	V_IN = 2.9 to 20 V, I_LOAD = 1 mA to 1.5 A	Full range	1.174	1.21	1.246	V
	Line regulation⁽¹⁾	ΔV_IN = 2.9 to 20 V, I_LOAD = 1 mA	Full range		2.5	6.5	mV
	Load regulation⁽¹⁾	V_IN = 2.9 V, ΔI_LOAD = 1 mA to 1.5 A	25°C		2	10	mV
	Load regulation⁽¹⁾	V_IN = 2.9 V, ΔI_LOAD = 1 mA to 1.5 A	Full range			18	mV
V_DO	Dropout voltage (V_OUT = 19.3 V )⁽⁶⁾⁽⁵⁾	I_LOAD = 1 mA	25°C		0.08	0.32	V
		I_LOAD = 1 mA	Full range			0.40
		I_LOAD = 100 mA	25°C		0.14	0.40
		I_LOAD = 100 mA	Full range			0.58
		I_LOAD = 500 mA	25°C		0.25	0.40
		I_LOAD = 500 mA	Full range			0.60
		I_LOAD = 750 mA	25°C		0.30	0.40
		I_LOAD = 750 mA	Full range			0.62
		I_LOAD = 1 A	25°C		0.34	0.45
		I_LOAD = 1 A	Full range			0.65
		I_LOAD = 1.25 A	25°C		0.40	0.50
		I_LOAD = 1.25 A	Full range			0.68
		I_LOAD = 1.5 A	25°C		0.45	0.60
		I_LOAD = 1.5 A	Full range			0.75
I_GND	GND pin current⁽⁴⁾⁽⁷⁾ V_IN = 2.9 V	I_LOAD = 0 mA	Full range		1	1.5	mA
		I_LOAD = 1 mA	Full range		1.1	1.6
		I_LOAD = 100 mA	Full range		3.3	7
		I_LOAD = 500 mA	Full range		8.5	30
		I_LOAD = 750 mA	Full range		15	45
		I_LOAD = 1 A	Full range		25	50
		I_LOAD = 1.25 A	Full range		36	80
		I_LOAD = 1.5 A	Full range		53	105
e_N⁽¹³⁾	Output voltage noise	C_OUT = 22 μF, I_LOAD = 1.5 A, V_IN = 5.5 V, V_OUT = 5 V B_W = 10 Hz to 100 kHz	25°C		50		μV_RMS
I_ADJ	ADJ pin bias current⁽¹⁾⁽⁸⁾		25°C		3	7	μA
I_ADJ	ADJ pin bias current⁽¹⁾⁽⁸⁾		Full range		5.5	15	μA
	Shutdown threshold	V_OUT = OFF to ON	Full range		0.9	2	V
	Shutdown threshold	V_OUT = ON to OFF	Full range	0.15	0.75		V
I_SHDN	SHDN pin current	V_SHDN = 0 V	Full range		0.01	1	μA
I_SHDN	SHDN pin current	V_SHDN = 20 V	Full range		3	20	μA
	Quiescent current in shutdown	V_IN = 6 V, V_SHDN = 0 V	Full range		0.01	10	μA
	Quiescent current in shutdown	V_IN = 6 V, V_SHDN = 0 V, Post 100kRads (si), T_J = 25°C⁽¹¹⁾	25°C		15	50	μA
	Ripple rejection⁽¹²⁾	V_IN – V_OUT = 1.5 V (avg), V_RIPPLE = 0.5 V_P-P, ƒ_RIPPLE = 120 Hz, I_LOAD = 0.75 A	25°C	60	68		dB
			Full range	58	63
		V_IN – V_OUT = 1.5 V (avg), V_RIPPLE = 0.5 V_P-P, f_RIPPLE = 120 Hz, I_LOAD = 1.5 A	25°C	50	60
			Full range	44	52
I_LIMIT	Current limit⁽¹²⁾	V_IN = 7 V, V_OUT = 0 V	Full range	1.7	1.9		A
I_LIMIT	Current limit⁽¹²⁾	V_IN = 2.9 V	Full range	1.6	1.9		A
I_IL	Input reverse leakage current	V_IN = –20 V, V_OUT = 0 V	Full range			300	μA
I_RO	Reverse output current⁽⁹⁾	V_OUT = 1.21 V, V_IN < 1.21 V	Full range		300	500	μA
TSD	Thermal shutdown temperature				175		°C

(1) The TPS7A4501 is tested and specified for these conditions with the ADJ pin connected to the OUT pin.

(2) Dropout voltages are limited by the minimum input voltage specification under some output voltage/load conditions.

(5) To satisfy requirements for minimum input voltage, the TPS7A4501 is tested and specified for these conditions with an external resistor divider (one 4.12-kΩ resistor and one 61.9-kΩ) for an output voltage of 19.3 V. The external resistor divider adds a 300-µA DC load on the output.

(6) Dropout voltage is the minimum input to output voltage differential needed to maintain regulation at a specified output current. In dropout, the output voltage is equal to: V_IN – V_DROPOUT.

(7) GND pin current is tested with V_IN = 2.9 V and a current source load. The GND pin current decreases at higher input voltages.

(8) ADJ pin bias current flows into the ADJ pin.

(9) Reverse output current is tested with the IN pin grounded and the OUT pin forced to the rated output voltage. This current flows into the OUT pin and out the GND pin.

(10) Typical values represent the likely parametric nominal values determined at the time of characterization. Typical values depend on the application and configuration and may vary over time. Typical values are not ensured on production material.

(11) This maximum limit applies to SMD 5962R1222403VXC post 100kRads (Si) test at 25°C.

(12) Parameter is specified by characterization for KGD and is not tested in production.

(13) Parameter is specified by bench characterization and is not tested in production.

7.7 Typical Characteristics

Figure 1. Dropout Voltage vs Output Current

V_IN = 6 V

I_OUT = 0 A

V_SHDN = V_IN

Figure 3. Quiescent Current vs Temperature

T_J = 25°C	R_OUT = 4.3 kΩ	V_SHDN = V_IN

Figure 5. Quiescent Current vs Input Voltage

T_J = 25°C

V_SHDN = V_IN

V_OUT = 1.21 V

Figure 7. Ground Current vs Input Voltage

V_SHDN = 0 V

Figure 9. SHDN Input Current vs Temperature

I_OUT = 1 mA

Figure 11. SHDN Threshold (Off To On) vs Temperature

Figure 13. ADJ Bias Current vs Temperature

V_IN = 7 V	V_OUT = 0 V

Figure 15. Current Limit vs Temperature

V_IN = 0 V	V_OUT = 1.21 V

Figure 17. Reverse Output Current vs Temperature

	I_OUT = 750 mA

Figure 19. Load Regulation vs Temperature

V_OUT = 2.4 V

Figure 2. Dropout Voltage vs Temperature

I_OUT = 1 mA

V_IN = 2.9 V

Figure 4. Output Voltage vs Temperature

T_J = 25°C	V_SHDN = V_IN
V_OUT = 1.21 V

Figure 6. Ground Current vs Input Voltage

V_IN = V_OUT(nom) + 1

Figure 8. Ground Current vs Output Current

Figure 10. SHDN Input Current vs SHDN Input Voltage

I_OUT = 1 mA

Figure 12. SHDN Threshold (On to Off) vs Temperature

ΔV_OUT = 100 mV

Figure 14. Current Limit vs Input/Output Differential Voltage

T_J = 25°C	V_IN = 0 V	V_OUT = V_ADJ
Current flows into OUT pin

Figure 16. Reverse Output Current vs Output Voltage

V_IN = 2.7 V	C_IN = 0	C_OUT = 10 µF
		(ceramic)
I_OUT = 750 mA	V_Ripple = 0.05 V_PP	T_A = 25°C

Figure 18. Ripple Rejection vs Frequency

8 Detailed Description

8.1 Overview

The TPS7A4501-SP is a 1.5-A LDO regulator optimized for fast-transient response. The devices are capable of supplying 1.5 A at a dropout voltage of 320 mV. The low operating quiescent current (1 mA) drops to less than 50 μA in shutdown. In addition to the low quiescent current, the TPS7A4501-SP regulators incorporate several protection features that make them ideal for use in battery-powered systems. The devices are protected against both reverse input and reverse output voltages. In battery-backup applications where the output can be held up by a backup battery when the input is pulled to ground, the TPS7A4501-SP functions as if it has a diode in series with its output and prevents reverse current flow. Additionally, in dual-supply applications where the regulator load is returned to a negative supply, the output can be pulled below ground by as much as (20 V – VIN) and still allow the device to start and operate.

8.2 Functional Block Diagram

TPS7A4501-SP FunctionalBlockDiagramSLVS720.gif

8.3 Feature Description

8.3.1 Adjustable Operation

The adjustable TPS7A4501-SP has an output voltage range of 1.21 to 20 V. The output voltage is set by the ratio of two external resistors as shown in Figure 20. The device maintains the voltage at the ADJ pin at 1.21 V referenced to ground. The current in R1 is then equal to (1.21 V/R1), and the current in R2 is the current in R1 plus the ADJ pin bias current. The ADJ pin bias current, 3 μA at 25°C, flows through R2 into the ADJ pin. Calculate the output voltage using the formula shown in Figure 20. The value of R1 should be less than 4.17 kΩ to minimize errors in the output voltage caused by the ADJ pin bias current. Note that in shutdown, the output is turned off, and the divider current is zero.

Figure 20. Adjustable Operation Schematic

The adjustable device is tested and specified with the ADJ pin tied to the OUT pin for an output voltage of 1.21 V. Specifications for output voltages greater than 1.21 V are proportional to the ratio of the desired output voltage to 1.21 V: V_OUT / 1.21 V. For example, load regulation for an output current change of 1 mA to 1.5 A is –3 mV (typical) at V_OUT = 1.21 V. At V_OUT = 5 V, load regulation is:

Equation 1. (5 V / 1.21 V)(–3 mV) = –12.4 mV

8.3.2 Fixed Operation

The TPS7A4501-SP can be used in a fixed-voltage configuration. Connect the SENSE/ADJ pin to OUT for proper operation. Figure 21 shows an example of this for a fixed output voltage of 1.21 V. During fixed voltage operation, the SENSE/ADJ pin can be used for a Kelvin connection if routed separately to the load. This allows the regulator to compensate for voltage drop across parasitic resistances (RP) between the output and the load. This compensation becomes more crucial with higher-load currents.

Figure 21. Kelvin Sense Connection

8.3.3 Overload Recovery

Like many IC power regulators, the TPS7A4501-SP has safe operating area protection. The safe area protection decreases the current limit as input-to-output voltage increases and keeps the power transistor inside a safe operating region for all values of input-to-output voltage. The protection is designed to provide some output current at all values of input-to-output voltage up to the device breakdown.

When power is first turned on, as the input voltage rises, the output follows the input, allowing the regulator to start up into very-heavy loads. During start up, as the input voltage is rising, the input-to-output voltage differential is small, allowing the regulator to supply large output currents. With a high input voltage, a problem can occur wherein removal of an output short does not allow the output voltage to recover. Other regulators also exhibit this phenomenon, so it is not unique to the TPS7A4501-SP.

The problem occurs with a heavy output load when the input voltage is high and the output voltage is low. Common situations occur immediately after the removal of a short circuit or when the shutdown pin is pulled high after the input voltage has already been turned on. The load line for such a load may intersect the output current curve at two points. If this happens, there are two stable output operating points for the regulator. With this double intersection, the input power supply may need to be cycled down to 0 and brought up again to make the output recover.

8.3.4 Output Voltage Noise

The TPS7A4501-SP regulator is designed to provide low output voltage noise over the 10-Hz to 100-kHz bandwidth while operating at full load. Output voltage noise is typically 50 µV/√Hz over this frequency bandwidth for the TPS7A4501-SP. For higher output voltages (generated by using a resistor divider), the output voltage noise is gained up accordingly.

Higher values of output voltage noise may be measured when care is not exercised with regard to circuit layout and testing. Crosstalk from nearby traces can induce unwanted noise onto the output of the TPS7A4501-SP. The user must also consider power-supply ripple rejection; the TPS7A4501-SP regulator does not have unlimited power-supply rejection and passes a small portion of the input noise through to the output.

Figure 22. Output Noise Plot, V_IN = 7 V, V_OUT = 5 V At 750 mA , C_OUT = 22 µF Tantalum Capacitor

8.3.5 Protection Features

The TPS7A4501-SP regulator incorporates several protection features, which makes the regulator ideal for use in battery-powered circuits. In addition to the normal protection features associated with monolithic regulators, such as current limiting and thermal limiting, the device is protected against reverse input voltages, reverse output voltages, and reverse voltages from output to input.

Current limit protection and thermal overload protection are intended to protect the device against current overload conditions at the output of the device. For normal operation, the junction temperature should not exceed 125°C. TPS7A4501-SP incorporates thermal protection which disables the output when the junction temperature rises approximately 175°C, allowing the device to cool.

The input of the device withstands reverse voltages of 20 V. Current flow into the device is limited to less than 1 mA (typically less than 100 μA), and no negative voltage appears at the output. The device protects both itself and the load. This provides protection against batteries that can be plugged in backward.

The output of the TPS7A4501-SP can be pulled below ground without damaging the device. If the input is left open circuit or grounded, the output can be pulled below ground by 20 V. The output acts like an open circuit; no current flows out of the pin. If the input is powered by a voltage source, the output sources the short-circuit current of the device and protects itself by thermal limiting. In this case, grounding the SHDN pin turns off the device and stops the output from sourcing the short-circuit current.

The ADJ pin of the adjustable device can be pulled above or below ground by as much as 7 V without damaging the device. If the input is left open circuit or grounded, the ADJ pin acts like an open circuit when pulled below ground and like a large resistor (typically 5 kΩ) in series with a diode when pulled above ground.

In situations where the ADJ pin is connected to a resistor divider that would pull the ADJ pin above its 7-V clamp voltage if the output is pulled high, the ADJ pin input current must be limited to less than 5 mA. For example, a resistor divider is used to provide a regulated 1.5-V output from the 1.21-V reference when the output is forced to 20 V. Choose the top resistor of the resistor divider so as to limit the current into the ADJ pin to <5 mA when the ADJ pin is at 7 V. The 13-V difference between OUT and ADJ divided by the 5-mA maximum current into the ADJ pin yields a minimum top resistor value of 2.6 kΩ.

In circuits where a backup battery is required, several different input/output conditions can occur. The output voltage may be held up while the input is either pulled to ground, pulled to some intermediate voltage, or is left open circuit.

When the IN pin of the TPS7A4501-SP is forced below the OUT pin or the OUT pin is pulled above the IN pin, input current typically drops to less than 2 μA. This can happen if the input of the device is connected to a discharged (low-voltage) battery and the output is held up by either a backup battery or a second regulator circuit. The state of the SHDN pin has no effect on the reverse output current when the output is pulled above the input.

8.4 Device Functional Modes

Table 1 shows the device modes.

Table 1. Device Modes

SHDN	DEVICE STATE
H	Regulated voltage
L	Shutdown

9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

9.1 Application Information

The TPS7A4501-SP regulator has very-low output noise, which makes it ideal for sensitive RF supply applications.

9.2 Typical Application

This section highlights some of the design considerations when implementing this device in various applications.

Figure 23. Adjustable Output Voltage Operation

9.2.1 Design Requirements

Table 2 shows the design requirements.

Table 2. Design Parameters

DESIGN PARAMETER	EXAMPLE VALUE
Input voltage (VIN)	5 V
Output voltage (VOUT)	2.5 V
Output current (IOUT)	0 to 1 A
Load regulation	1%

9.2.2 Detailed Design Procedure

The TPS7A4501-SP has an adjustable output voltage range of 1.21 to 20 V. The output voltage is set by the ratio of two external resistors, R1 and R2, as shown in Figure 23. The device maintains the voltage at the ADJ pin at 1.21 V referenced to ground. The current in R1 is then equal to (1.21 V/R1), and the current in R2 is the current in R1 plus the ADJ pin bias current. The ADJ pin bias current, 3 µA at 25°C, flows through R2 into the ADJ pin. Calculate the output voltage using Equation 2.

Equation 2. TPS7A4501-SP equationxx.gif

The value of R1 should be less than 4.17 kΩ to minimize errors in the output voltage caused by the ADJ pin bias current. Note that in shutdown the output is turned off, and the divider current is zero. For an output voltage of 2.50 V, R1 is set to 4 kΩ. R2 is then found to be 4.22 kΩ using Equation 2.

Equation 3. TPS7A4501-SP equationxy.gif

Equation 4. V_OUT = 2.50 V

The adjustable device is tested and specified with the ADJ pin tied to the OUT pin for an output voltage of 1.21 V. Specifications for output voltages greater than 1.21 V are proportional to the ratio of the desired output voltage to 1.21 V: V_OUT / 1.21 V. For example, load regulation for an output current change of 1 mA to 1.5 A is –2 mV (typical) at V_OUT = 1.21 V. At V_OUT = 2.50 V, the typical load regulation is:

Equation 5. (2.50 V / 1.21 V)(–2 mV) = –4.13 mV

shows the actual change in output is about 3 mV for a 1-A load step. The maximum load regulation at 25°C is –8 mV. At V_OUT = 2.50 V, the maximum load regulation is:

Equation 6. (2.50 V / 1.21 V)(–8 mV) = –16.53 mV

Because 16.53 mV is only 0.7% of the 2.5-V output voltage, the load regulation meets the design requirements.

9.2.2.1 Output Capacitance and Transient Response

The TPS7A4501-SP regulator is designed to be stable with a wide range of output capacitors. The ESR of the output capacitor affects stability, most notably with small capacitors. TI recommends a minimum output capacitor of 10 μF with an ESR of 3 Ω or less to prevent oscillations. Larger values of output capacitance can decrease the peak deviations and provide improved transient response for larger load current changes. Bypass capacitors, used to decouple individual components powered by the TPS7A4501-SP, increase the effective output capacitor value.

Give extra consideration to the use of ceramic capacitors. Ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior over temperature and applied voltage. The most common dielectric used for a harsh environment is X7R. Ceramic capacitors lose capacitance when DC bias is applied across the capacitor. This capacitance loss is due to the polarization of the ceramic material. The capacitance loss is not permanent: after a large DC bias is applied, reducing the DC bias reduces the degree of polarization and capacitance increases. DC bias effects vary dramatically with voltage rating, case size, capacitor value, and capacitor manufacturer. Because a capacitor could lose more than 50% of its capacitance with DC bias voltages near the voltage rating of the capacitor, it is important to consider DC bias when selecting a ceramic capacitor for an application.

Ceramic capacitors' dielectric also changes over the temperature range. For example X7R, the first letter X denotes lower temperature range –55°C whereas 7 denotes a higher temperature range 125°C and R denotes capacitance variation over the temperature range (±15%). For harsh environment applications, minimum dielectric thickness must be 1 mil for 100-V DC-rated capacitor and 0.8 mil for 50-V DC-rated capacitors.

Voltage and temperature coefficients are not the only sources of problems. Some ceramic capacitors have a piezoelectric response. A piezoelectric device generates voltage across its terminals due to mechanical stress, similar to the way a piezoelectric accelerometer or microphone works. For a ceramic capacitor, the stress can be induced by vibrations in the system or thermal transients.

Tantalum capacitors can provide higher capacitance per unit volume. Tantalum capacitors can be either manganese dioxide (MNO2)-based capacitors where the cathode is MN02 or polymer. MN02-based tantalum capacitors exhibit high ESR as compared to polymer-based tantalum capacitors. MN02-based tantalum capacitors require in excess of 60% voltage derating. Thus, a 10-V rated capacitor can only be used for 3.3-V application. Whereas polymer-based capacitors only require 10% voltage derating. Paralleling ceramic and tantalum capacitors provide optimum balance between capacitance and ESR.

Table 3 highlights some of the capacitors used in the device.

Table 3. TPS7A4501-SP Capacitors

CAPACITOR PART NUMBER	CAPACITOR DETAILS TYPE VENDOR (CAPACITOR, VOLTAGE, ESR)	TYPE	VENDOR
T493X226M025AH6x20	22 μF, 25 V, 35 mΩ	Tantalum - MnO2	Kemet
T525D476M016ATE035	47 μF, 10 V, 35 mΩ	Tantalum - Polymer	Kemet
T525D107M010ATE025	100 μF, 10 V, 25 mΩ	Tantalum - Polymer	Kemet
T541X337M010AH6720	330 μF, 10 V, 6 mΩ	Tantalum - Polymer	Kemet
T525D227M010ATE025	220 μF, 10 V, 25 mΩ	Tantalum - Polymer	Kemet
T495X107K016ATE100	100 μF, 16 V, 100 mΩ	Tantalum - MnO2	Kemet
CWR29FK227JTHC	220 μF, 10 V, 180 mΩ	Tantalum - MnO2	AVX
THJE107K016AJH	100 μF, 16 V, 58 mΩ	Tantalum	AVX
THJE227K010AJH	220 μF, 10 V, 40 mΩ	Tantalum	AVX
SR2225X7R335K1P5#M123	3.3 μF, 25 V, 10 mΩ	Ceramic	Presidio Components Inc

9.2.2.2 Compensation

TPS7A4501-SP is internally compensated. However, the user can implement a lead network using C₃ to boost the phase margin as well as reduce output noise.

Figure 24. Compensation Schematic

R₁, the bottom resistor, and R₂, the top resistor, form the output voltage divider network. C₃ across R₂ adds a lead network.

For R₁ = 3.2 kΩ and R₂ = 10 kΩ, V_OUT is set at 5 V and C₃ = 470 pF.

Zero and pole can be calculated as shown in the following equations.

Equation 7. TPS7A4501-SP eq1_fz2_slvsc31.gif

Equation 8. ƒ_z2 = 33.863 kHz

Equation 9. TPS7A4501-SP eq2_R1p_slvsc31.gif

Equation 10. R_1p = 2.424 kΩ

Equation 11. TPS7A4501-SP eq3_fp2_slvsc31.gif

Equation 12. ƒ_p2 = 139.684 kHz

9.2.3 Application Curves

The following waveforms indicate the transient behavior of the TPS7A4501-SP.

Figure 25. 1-A Load Transient Response, Step Load is from 0.1 to 1.1 A, Vin = 5 V, Vout = 2.5 V

Figure 27. 1-A Load, Expanded View (Low to High), Slew Rate = 5.8 A/μS

Figure 26. 1-A Load, Expanded View (High to Low), Slew Rate = 7.3 A/μS