10.1 Layout Guidelines
A good PCB layout is necessary for the TPS65680 device to achieve its specified performance.
The main PCB layout recommendations for the TPS65680 device are:
- Connect one or more decoupling capacitors between each power supply pin and ground. The power supply pins are VIN, VGH, VGL1 and VGL2 (VGH and VGL1 are the most important). Because VGL1 and VGL2 use the same supply voltage, these pins can share the same decoupling capacitors.
- We recommend an effective capacitance of at least 1 µF for each decoupling capacitor. Make sure you consider the DC bias effect – when a DC voltage is applied to a ceramic capacitor it has much less capacitance than its nominal value. Good capacitor manufacturers provide graphs showing the effective capacitance at different DC bias voltages.
- Connect the decoupling capacitors to the pins of the TPS65680 device with short, wide tracks on the top layer. Because vias have parasitic resistance and inductance, try not to use them to connect to the decoupling capacitors (this is not always possible, so just do your best).
- Include a ground plane on layer 2 beneath the TPS65680 device, its external components and output signals. This ground plane reduces the parasitic inductance of the PCB tracks on layer 1.
- Include a large copper plane on one of the internal layers and connect it to VGL2 with thermal vias. The package information at the end of this data sheet tells you the number and the size of the thermal vias we recommend. This copper plane is the primary path to conduct heat away from the TPS65680 device. If the area of this copper plane is too small, or if the number and size of the thermal vias is wrong, the TPS65680 device can get hot.
No PCB layout is perfect, and some trade-offs are usually required. Use the above list as a guideline and follow as many of the recommendations as you can. shows an extract from the PCB layout of the TPS65680 Evaluation Module. It illustrates how the above recommendations can be used (as far as possible) in a practical PCB design.