TPS74701EVM-177, TPS74801EVM-177 Evaluation Module

Abstract

Figure 1-1 TPS74x01EVM-177 Evaluation Module (EVM)

This user's guide describes the characteristics, operation, and use of the TPS74x01EVM-177 evaluation module (EVM). This EVM contains either the TPS74701 or TPS74801 low-dropout linear regulator device. This user's guide includes EVM specifications, recommended test setup, test results, bill of materials (BOM), and a schematic diagram.

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1 Introduction

The Texas Instruments TPS74x01EVM-177 evaluation module uses the TPS74701 or TPS74801 low-dropout linear regulator device. These regulators require a low-power bias voltage, V_BIAS, and a power input voltage, V_IN. These two regulators are capable of providing output voltages down to 0.8 V and have an integrated supervisory circuit with open-drain output that goes to high impedance when the output voltage reaches regulation (power good or PG). The TPS74701 and TPS74801 can provide up to 0.5 A and 1.5 A of output current, respectively, and each has a soft start (SS) pin which allows the user to set the linear ramp rate for the output voltage at start-up. The purpose of the EVM is to facilitate evaluation of the TPS74x01 devices.

1.1 Performance Specification Summary

Table 1-1 provides a summary of the TPS74x01EVM-177 performance specifications. All specifications are provided for an ambient temperature of 25°C.

Table 1-1 Typical Performance Specification Summary

	Condition	Voltage Range (V)			Current Range (mA)
	Condition	Min	Typ	Max	Min	Typ	Max
V_BIAS supply	TPS74801EVM-177 (HPA177-001), V_IN = V_BIAS, I_OUT = 1.5 A	2.83⁽¹⁾	5	5.5		5
V_BIAS supply	TPS74701EVM-177 (HPA177-002), V_IN = V_BIAS, I_OUT = 0.5 A	2.7⁽¹⁾	5	5.5		5
V_IN supply	TPS74801EVM-177 (HPA177-001), V_BIAS – V_OUT ≥ 3.25 V, I_OUT = 1.5 A	1.395⁽¹⁾		5.5⁽²⁾			1500
V_IN supply	TPS74701EVM-177 (HPA177-002), V_BIAS – V_OUT ≥ 1.62 V, I_OUT = 0.5 A	1.35⁽¹⁾		5.5⁽²⁾			500
V_OUT	TPS74801EVM-177 (HPA177-001)	1.17⁽³⁾	1.20	1.23⁽³⁾			1500⁽²⁾
V_OUT	TPS74701EVM-177 (HPA177-002)	1.17⁽³⁾	1.20	1.23⁽³⁾			500⁽²⁾

(1) This voltage is the minimum voltage to provide the maximum output current in the table assuming the typical V_BIAS voltage is applied. Lower output currents are achievable with lower V_IN and V_BIAS voltages. See the data sheet for V_IN to V_OUT and V_BIAS to V_OUT dropout data.

(2) Linear regulator power dissipation is computed as P_D = (V_IN – V_OUT) × I_OUT. As specified in the data sheet, the regulator package has a finite power dissipation rating depending on the ambient temperature, board type, and airflow. Using any V_IN or V_OUT voltages other than the typical voltages recommended in the table or using the EVM in an environment with an ambient temperature higher than 25°C significantly reduces the maximum allowed output current. See the data sheet for the regulator package thermal resistance data, and see the Digital Designer's Guide to Linear Voltage Regulators and Thermal Management application note for a full explanation.

(3) The EVM uses ±1% feedback resistors. Therefore, the EVM output tolerance is the ±2% internal reference tolerance plus
2 × (1 – V_REF/V_OUT) × TOL_FBRES = 2 × (1– 0.8 V/1.2 V) × ±1% = 0.67% or ±2.67%. Tighter tolerance feedback resistors must be used for tighter output tolerance.