SLVU189B february   2007  – may 2023 TPS74701 , TPS74801

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 Performance Specification Summary
    2. 1.2 Modifications
  5. 2Input and Output Connector Descriptions
    1. 2.1  J1–VIN/GND
    2. 2.2  J2–GND
    3. 2.3  J3–VIN
    4. 2.4  J4–VBIAS
    5. 2.5  J5–GND
    6. 2.6  J6–VOUT
    7. 2.7  J7–GND
    8. 2.8  J8–VOUT/GND
    9. 2.9  J10–EN
    10. 2.10 J11–GND
    11. 2.11 J12-VIN/GND
    12. 2.12 J13-VOUT/GND
    13. 2.13 JP1–1 ms/Simult Versus 10 ms/Ratio
    14. 2.14 S1
    15. 2.15 TP1
    16. 2.16 TP2
    17. 2.17 TP3
    18. 2.18 TP4
  6. 3Test Setup
  7. 4Test Results
  8. 5Board Layout
  9. 6Bill of Materials and Schematic
    1. 6.1 Schematic Drawing
  10. 7Revision History

7 Revision History

Changes from Revision A (December 2007) to Revision B (May 2023)

  • Updated the numbering format for tables, figures, and cross-references throughout the documentGo
  • Added board image of TPS74x01EVM-177 to front pageGo
  • Changed format of reference in the second table note of Table 1-1 Go
  • Deleted header information for unused header J9-TRACK IN Go
  • Added information for S1 switch described in Section 2.14 Go
  • Changed board layout images to reflect changes to EVM layout and silkscreenGo
  • Added Figure 5-4 to Section 5 to show the bottom overlay of the HPA177 EVMGo
  • Added and deleted information in the Table 6-1 to reflect changes to EVM layout and changes to populated components on the EVM Go
  • Changed Figure 6-1 to reflect the current TPS74x01EVM-177 schematic Go