SLVUAF6A June   2015  – May 2021 TPS62745

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Background
  3. 2Setup
    1. 2.1 Input/Output Connector Descriptions
    2. 2.2 Operation
  4. 3Common Efficiency Measurement Errors with Ultra-Low Iq Devices
    1. 3.1 Efficiency Measurement Setup
    2. 3.2 Pullup and Pulldown Resistors
  5. 4Board Layout
  6. 5Schematic and Bill of Materials
    1. 5.1 Schematic
    2. 5.2 Bill of Materials
  7. 6Revision History

4 Board Layout

This section provides the TPS62745EVM-622 board layout and illustrations. The gerbers are available on the EVM product page: TPS62745EVM-622.

GUID-20B71ACE-A702-4F1E-94F2-575E9D1D0818-low.gif Figure 4-1 Assembly Layer
GUID-21F4B937-8177-4705-ADD2-3C979752D812-low.gif Figure 4-2 Top Layer
GUID-9C0AA658-DB25-4BD0-AC0A-153F795CB4BB-low.gif Figure 4-3 Bottom Layer