4 Operation Notes

In order to operate the EVM, apply a valid input voltage of 4.5 V to 15 V. The undervoltage lockout (UVLO) can be programmed the PMBus commands.

The output voltage is set at the factory to 0.6 V. It can be programmed over the allowable V_OUT range by using the PMBus VOUT_COMMAND.

The Power-Good (PGOOD) indicator of the EVM will assert high when the output voltage is within ±5% of the programmed output voltage value. A 10-kΩ pullup resistor (R18) is populated between the PGOOD pin and the 3V3 pin.

The TPSM846C23DEVM-807 is set up to operate at 500 kHz. A clock circuit is present on the bottom of the EVM. The clock circuit produces a 500 kHz, 50% duty cycle clock that feeds both devices. If another switching frequency is required, R23 must be removed from the clock circuit on the bottom of the EVM and an external clock must be connected to the EXT CLK test point. The external clock applied to EXT CLK test point must be 2× the required frequency. The device can be synchronized to an external clock over the frequency range of 300 kHz to 1 MHz. Refer to the product data sheet for further information on synchronization.

The TPSM846C23DEVM-807 includes both input and output capacitors. The EVM includes footprints for adding additional input and output capacitors to the EVM. Adding additional capacitance will improve transient response. The actual capacitance required will depend on the input and output voltage conditions of the particular application, along with the desired transient response. Refer to the product data sheet for further information on input and output capacitance and transient response.

This EVM is designed to be used with the USB-to-GPIO pod which enables communication over the PMBus.

Jumper settings should not be changed while the module is powered. Permanent damage ca occur.