SLVUBP9A December   2020  – May 2021 TPSM41625

 

  1.   Trademarks
  2. 1EVM Setup
  3. 2EVM Connectors and Test Points
  4. 3Test Results
  5. 4PCB Layouts
  6. 5Schematics
  7. 6Bill of Materials
  8. 7Revision History

PCB Layouts

Figure 4-1 through Figure 4-10 show the PCB layers of the EVM.

GUID-20201120-CA0I-T1TK-RFZZ-BV2GDTVZBWW0-low.gif Figure 4-1 Top Silk Screen (Top View)
GUID-20201120-CA0I-9WHS-LWFP-W2VGQXKQJWMB-low.gif Figure 4-2 Top Layer
GUID-20201120-CA0I-T3SB-X00F-7QLTLKWJ3MQR-low.gif Figure 4-3 Signal Layer 1
GUID-20201120-CA0I-1CRB-VF2C-TZ37ZCHG09HP-low.gif Figure 4-4 Signal Layer 2
GUID-20201120-CA0I-8F1D-97D2-N3D3XXVT4CC9-low.gif Figure 4-5 Signal Layer 3
GUID-20201120-CA0I-81BR-XSCB-X0BJBQZPW24H-low.gif Figure 4-6 Signal Layer 4
GUID-20201120-CA0I-2QT4-MTW9-CG5W9W9DNGRR-low.gif Figure 4-7 Signal Layer 5
GUID-20201120-CA0I-TSS3-VPDG-BMWDC8ZWPZDK-low.gif Figure 4-8 Signal Layer 6
GUID-20201120-CA0I-CJWZ-CDBB-63SJDPWDHCVW-low.gif Figure 4-9 Bottom Layer
GUID-20201120-CA0I-PBM5-L2F6-99XLLGVPSWZV-low.gif Figure 4-10 Bottom Layer Silk Screen (Bottom View)