This EVM features the TPSM41625 and TPSM41615 synchronous buck power module configured for operation with a 4-V to 16-V input voltage range. The output voltage can be set to several popular values by using configuration jumpers. Similarly, the switching frequency can be set to one of five values with a jumper. The full output current rating of the device can be supplied by the EVM. Input and output capacitors are included on the board to accommodate the entire range of input and output voltages. Monitoring test points are provided to allow measurement of efficiency, power dissipation, input ripple, output ripple, line and load regulation, and transient response. Control test points and component footprints are provided for use of the EN, POWER GOOD, and SYNC features of the device. The EVM uses a recommended PCB layout that maximizes thermal performance and minimizes output ripple and noise.

Figure 2-1 highlights the user interface items associated with the EVM. The PVIN and PGND terminal blocks (TB1 and TB2) are used for connection to the host input supply and the VOUT and PGND terminal blocks (TB3 and TB4) are used for connection to the load. These terminal blocks can accept up to 16-AWG wire.

Figure 2-1 EVM User Interface

The PVIN S+ and PVIN S- input voltage test points as well as the RS+ and RS- output voltage test points, located near the power terminal blocks are intended to be used as voltage monitoring points where voltmeters can be connected to measure PVIN and VOUT. Do not use these S+ and S- monitoring test points as the input supply or output load connection points. The PCB traces connecting to these test points are not designed to support high currents.

The PVIN Scope (J7) and VOUT Scope (J8) sockets can be used to monitor PVIN and VOUT waveforms with an oscilloscope. These test points are intended for use with un-hooded scope probes outfitted with a low-inductance ground lead (ground spring) mounted to the scope probe barrel. The two sockets of each test point are on 0.1 inch centers. The scope probe tip should be inserted into the socket marked with a "+" sign, and the scope ground lead should be inserted into the other socket.

The control test points located around the device are made available to test the features of the device. Refer to the Test Point Description section for more information on the individual control test points. Other features, such as UVLO (R2, R3), ILIM (R23), SS (R24) and MODE (R25) can be altered by manually adding or changing the value on the associated footprints for each component located on the bottom-side of the EVM.

The VREF jumper (J9), VOUT jumper (J10), FSW jumper (J11), and the RAMP jumper (J12) are provided for selecting the internal reference voltage, switching frequency, desired output voltage, and appropriate RAMP setting. Before applying power to the EVM, make sure that the jumpers are present and properly positioned for the intended output voltage. Ensure to set the internal reference voltage prior to selecting the desired output voltage (selecting the highest reference voltage will result in the most accurate output voltage set point). Refer to Table 2-1 for the recommended jumper settings.

For example, if an output voltage of 1.8 V is desired and is supplied by a 12-V input, then a proper configuration is as follows:

1. Set VREF (J9) as 1.1 V.
2. Set VOUT (J10) as 1.8 V.
3. Select FSW (J11).
4. Set RAMP (J12) as 187 kΩ.

Another example, if an output voltage of 1.0 V is desired and is supplied by a 12-V input, then a proper configuration is as follows:

1. Set VREF (J9) as 1.0 V.
2. Set VOUT (J10) as VREF.
3. Select FSW (J11).
4. Set RAMP (J12) as 78.7 kΩ