SLVUCF6 july   2023

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Requirements
    1. 2.1 Hardware
    2. 2.2 Software
  6. 3TPS65219 Resources Overview
  7. 4EVM Configuration
    1. 4.1 Configuring the USB to I2C Adapter
    2. 4.2 Configuration Headers
    3. 4.3 Test Points
  8. 5NVM Programming
    1. 5.1 TPS65219EVM-SKT default NVM settings
    2. 5.2 NVM programming in Initialize State
    3. 5.3 NVM programming in Initialize State
  9. 6Graphical User Interface (GUI)
    1. 6.1 TPTS65219 EVM Debugging
    2. 6.2 I2C Communication Port and Adapter Debugging
    3. 6.3 Getting Started
      1. 6.3.1 Finding the GUI
      2. 6.3.2 Downloading the Required Software
      3. 6.3.3 Launching the GUI
      4. 6.3.4 Connecting to the EVM
    4. 6.4 Collateral Page
    5. 6.5 Register Map Page
    6. 6.6 NVM Configuration Page
      1. 6.6.1 NVM Fields
      2. 6.6.2 Create / Load a Custom Configuration
    7. 6.7 Sequence Configuration
    8. 6.8 NVM Programming Page
    9. 6.9 Additional Features
  10. 7Schematics, PCB Layouts, and Bill of Materials
    1. 7.1 TPS65219EVM-SKT Schematic
    2. 7.2 TPS65219EVM-SKT PCB Layers
    3. 7.3 TPS65219EVM-RSM Schematic
    4. 7.4 TPS65219EVM-RSM PCB Layers
    5. 7.5 Bill of Materials

4 EVM Configuration

The following sections outline how to configure the TPS65219EVM for general experimentation.

EVM Configuration

The TPS65219EVM-SKT can be configured as follows:

  1. Configure regulator input supply rails for the expected application using the jumpers indicated in the "Supply Voltage Setup "
  2. Configure the multi-function pins externally using the mode configuration descriptions indicated in "Multi-Function pin setup". Please note that the default configuration for regulator choice in SD or DDR voltage selection may differ for each individual NVM configuration (polarity is configurable).
  3. Connect VSYS to a power supply capable of supporting the application and enable the supply. Typical supply for TPS6521905 is 5V.
  4. If using a version of TPS65219 configured for First Supply Detection (FSD), the power-up sequence is executed as soon as the 5V supply is connected to VSYS.
Note: The TPS6521905 NVM comes with all the power rails disabled by default. When using this variant, an ON request must be triggered by pressing and releasing the SW1 push-button so the PMIC can detect a rising edge on the EN/PB/VSENSE pin and transition to Active state. Once in Active state, the power rails can be enabled by writing to register ENABLE_CTRL, address 0x02.