SLVUCM3 july   2023 AM62A3 , AM62A3-Q1 , AM62A7 , AM62A7-Q1 , TPS6593-Q1

 

  1.   1
  2.   User's Guide for Powering AM62A with TPS65931211-Q1 PMIC
  3.   Trademarks
  4. 1Introduction
  5. 2Device Versions
  6. 3Processor Connections
    1. 3.1 Power Mapping
      1. 3.1.1 Supporting 0.85V on VDD_CORE
      2. 3.1.2 Using 5V Input Supply
    2. 3.2 Control Mapping
  7. 4Supporting Functional Safety ASIL-B Requirements
  8. 5Static NVM Settings
    1. 5.1  Application-Based Configuration Settings
    2. 5.2  Device Identification Settings
    3. 5.3  BUCK Settings
    4. 5.4  LDO Settings
    5. 5.5  VCCA Settings
    6. 5.6  GPIO Settings
    7. 5.7  Finite State Machine (FSM) Settings
    8. 5.8  Interrupt Settings
    9. 5.9  POWERGOOD Settings
    10. 5.10 Miscellaneous Settings
    11. 5.11 Interface Settings
    12. 5.12 Watchdog Settings
  9. 6Pre-Configurable Finite State Machine (PFSM) Settings
    1. 6.1 Configured States
    2. 6.2 PFSM Triggers
    3. 6.3 Power Sequences
      1. 6.3.1 Sequence: immediateOff2Safe_pd
      2. 6.3.2 Sequence: orderlyOff2safe
      3. 6.3.3 Sequence: warmReset
      4. 6.3.4 Sequence: any2active
      5. 6.3.5 Sequence: any2_s2r
  10. 7Application Examples
    1. 7.1 Entering and Exiting S2R (Suspend to RAM)
    2. 7.2 Entering and Exiting Standby
    3. 7.3 Entering and Existing LP_STANDBY
  11. 8References

PFSM Triggers

There are various triggers that can enable a state transition between configured states. Table 6-1 describes each trigger and its associated state transition from highest priority (Immediate Shutdown) to lowest priority. Active triggers of higher priority block triggers of lower priority and the associated sequence.

Table 6-1 State Transition Triggers
Trigger Priority (ID) Immediate (IMM) REENTERANT PFSM Current State PFSM Destination State Power Sequence or Function Executed
Immediate Shutdown0TrueFalseANYTO_SAFEimmediateOff2Safe_pd
Orderly Shutdown 1 True False ANY TO_SAFE orderlyOff2safe
1 = High (Always True)2FalseFalseSTANDBYLP STANDBYenterLPstandby
FORCE_STANDBY 3FalseFalseACTIVE, STANDBY, S2RSTANDBYorderlyOff
WD_ERROR4FalseTrueACTIVEACTIVE warmReset
ESM MCU Error5FalseTrueACTIVEACTIVE warmReset
I2C_16FalseTrueACTIVERUNTIME_BISTExecute RUNTIME BIST
I2C_27FalseTrueACTIVEACTIVEEnable I2C CRC on I 2C1 and I2C2
SU_ACTIVE8FalseFalseSTANDBYACTIVE any2active
WKUP19FalseFalseSTANDBY, ACTIVEACTIVEany2active
I2C_010FalseFalseACTIVESTANDBYorderlyOff
I2C_311FalseFalseACTIVEACTIVEDevice is prepared for OTA NVM update
FORCE_STANDBY = LOW12FalseFalsePFSM_STARTACTIVEany2active
MCU_POWER_ERROR13FalseFalseACTIVEACTIVEwarmReset
GPIO9 (rise)14FalseTrueACTIVEACTIVEENVPP
GPIO9 (fall)15FalseTrueACTIVEACTIVE DISVPP
GPIO5 (fall)16FalseTrueACTIVEACTIVE SD_1V8
GPIO5 (rise)17FalseTrueACTIVEACTIVESD_3V3
GPIO11 (fall)18FalseTrueACTIVEACTIVE RST_SDCARD
GPIO11 (rise)19FalseTrueACTIVEACTIVE EN_SDCARD
A20FalseFalseACTIVE, S2RACTIVEany2active
D21FalseFalseACTIVE, S2RS2R any2_s2r
1 = High (Always True) 22 True False TO_SAFE SAFE_RECOVERY NA