SLVUCM3 july 2023 AM62A3 , AM62A3-Q1 , AM62A7 , AM62A7-Q1 , TPS6593-Q1
These settings detail the voltages, configurations, and monitoring of the BUCK rails stored in the NVM. All these settings can be changed though I2C after startup. Some settings, typically the enable bits, are also changed by the PFSM, as described in Section 6.3.
Register Name | Field Name | TPS65931211-Q1 | |
---|---|---|---|
Value | Description | ||
BUCK1_CTRL | BUCK1_EN | 0x0 | Disabled; BUCK1 regulator |
BUCK1_FPWM | 0x1 | PWM operation only. | |
BUCK1_FPWM_MP | 0x0 | Automatic phase adding and shedding. | |
BUCK1_VMON_EN | 0x0 | Disabled; OV, UV, SC and ILIM comparators. | |
BUCK1_VSEL | 0x0 | BUCK1_VOUT_1 | |
BUCK1_PLDN | 0x1 | Enabled; Pull-down resistor | |
BUCK1_RV_SEL | 0x0 | Disabled | |
BUCK1_CONF | BUCK1_SLEW_RATE | 0x3 | 5.0 mV/μs |
BUCK1_ILIM | 0x5 | 5.5 A | |
BUCK2_CTRL | BUCK2_EN | 0x0 | Disabled; BUCK2 regulator |
BUCK2_FPWM | 0x1 | PWM operation only. | |
BUCK2_VMON_EN | 0x0 | Disabled; OV, UV, SC and ILIM comparators. | |
BUCK2_VSEL | 0x0 | BUCK2_VOUT_1 | |
BUCK2_PLDN | 0x1 | Enabled; Pull-down resistor | |
BUCK2_RV_SEL | 0x0 | Disabled | |
BUCK2_CONF | BUCK2_SLEW_RATE | 0x3 | 5.0 mV/μs |
BUCK2_ILIM | 0x5 | 5.5 A | |
BUCK3_CTRL | BUCK3_EN | 0x0 | Disabled; BUCK3 regulator |
BUCK3_FPWM | 0x1 | PWM operation only. | |
BUCK3_FPWM_MP | 0x0 | Automatic phase adding and shedding. | |
BUCK3_VMON_EN | 0x0 | Disabled; OV, UV, SC and ILIM comparators. | |
BUCK3_VSEL | 0x0 | BUCK3_VOUT_1 | |
BUCK3_PLDN | 0x1 | Enabled; Pull-down resistor | |
BUCK3_RV_SEL | 0x0 | Disabled | |
BUCK3_CONF | BUCK3_SLEW_RATE | 0x0 | 33 mV/μs |
BUCK3_ILIM | 0x5 | 5.5 A | |
BUCK4_CTRL | BUCK4_EN | 0x0 | Disabled; BUCK4 regulator |
BUCK4_FPWM | 0x0 | PFM and PWM operation (AUTO mode). | |
BUCK4_VMON_EN | 0x0 | Disabled; OV, UV, SC and ILIM comparators. | |
BUCK4_VSEL | 0x0 | BUCK4_VOUT_1 | |
BUCK4_PLDN | 0x1 | Enabled; Pull-down resistor | |
BUCK4_RV_SEL | 0x0 | Disabled | |
BUCK4_CONF | BUCK4_SLEW_RATE | 0x3 | 5.0 mV/μs |
BUCK4_ILIM | 0x5 | 5.5 A | |
BUCK5_CTRL | BUCK5_EN | 0x0 | Disabled; BUCK5 regulator |
BUCK5_FPWM | 0x0 | PFM and PWM operation (AUTO mode). | |
BUCK5_VMON_EN | 0x0 | Disabled; OV, UV, SC and ILIM comparators. | |
BUCK5_VSEL | 0x0 | BUCK5_VOUT_1 | |
BUCK5_PLDN | 0x1 | Enable Pull-down resistor | |
BUCK5_RV_SEL | 0x0 | Disabled | |
BUCK5_CONF | BUCK5_SLEW_RATE | 0x3 | 5.0 mV/μs |
BUCK5_ILIM | 0x3 | 3.5 A | |
BUCK1_VOUT_1 | BUCK1_VSET1 | 0x2d | 0.750 V |
BUCK1_VOUT_2 | BUCK1_VSET2 | 0x2d | 0.750 V |
BUCK2_VOUT_1 | BUCK2_VSET1 | 0x2d | 0.750 V |
BUCK2_VOUT_2 | BUCK2_VSET2 | 0x2d | 0.750 V |
BUCK3_VOUT_1 | BUCK3_VSET1 | 0xfd | 3.30 V |
BUCK3_VOUT_2 | BUCK3_VSET2 | 0xfd | 3.30 V |
BUCK4_VOUT_1 | BUCK4_VSET1 | 0x73 | 1.10 V |
BUCK4_VOUT_2 | BUCK4_VSET2 | 0x73 | 1.10 V |
BUCK5_VOUT_1 | BUCK5_VSET1 | 0xb2 | 1.80 V |
BUCK5_VOUT_2 | BUCK5_VSET2 | 0xb2 | 1.80 V |
BUCK1_PG_WINDOW | BUCK1_OV_THR | 0x3 | +5% / +50 mV |
BUCK1_UV_THR | 0x3 | -5% / -50 mV | |
BUCK2_PG_WINDOW | BUCK2_OV_THR | 0x3 | +5% / +50 mV |
BUCK2_UV_THR | 0x3 | -5% / -50 mV | |
BUCK3_PG_WINDOW | BUCK3_OV_THR | 0x3 | +5% / +50 mV |
BUCK3_UV_THR | 0x3 | -5% / -50 mV | |
BUCK4_PG_WINDOW | BUCK4_OV_THR | 0x4 | +6% / +60 mV |
BUCK4_UV_THR | 0x4 | -6% / -60 mV | |
BUCK5_PG_WINDOW | BUCK5_OV_THR | 0x4 | +6% / +60 mV |
BUCK5_UV_THR | 0x4 | -6% / -60 mV |