SLVUCU6A November   2023  – October 2024

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Getting Started
    2. 2.2 EVM Details
      1. 2.2.1 Terminal Blocks
      2. 2.2.2 Test Point Descriptions
      3. 2.2.3 Configuration Headers
      4. 2.2.4 Connectors
      5. 2.2.5 Dip Switches
      6. 2.2.6 EVM Control and GPIO
    3. 2.3 Customization
      1. 2.3.1 Changing the Communication Interface
      2. 2.3.2 Changing the Phase Configuration
  9. 3Software
    1. 3.1 GUI Tool
  10. 4Hardware Design Files
    1. 4.1 Schematics
    2. 4.2 PCB Layouts
    3. 4.3 Bill of Materials
  11. 5Additional Information
    1.     Trademarks
  12. 6Related Documentation
  13. 7Revision History

Dip Switches

There are two DIP switches S1 and S2 on the bottom side of the PCB. These switches allow the user to disconnect the level shifter from the PMIC GPIOs or serial interfaces. The level shifter has pull-up resistors on the MCU side that can cause unwanted high state on the GPIO signals if configured in high impedance state. See Table 2-8 for the descriptions of the switches.

Table 2-8 Dip switches
Switch Pin Signal line
S1 1-16 SDA_I2C1/SDI_SPI
2-15 SCL_I2C1/SCK_SPI
3-14 SDA_I2C2/SDO_SPI
4-13 SCL_I2C2/CS_SPI
5-12 GPIO1
6-11 GPIO2
7-10 GPIO3
8-9 GPIO4
S2 1-16 GPIO5
2-15 GPIO6
3-14 nINT
4-13 VCCA - VCCA_ADC
5-12 VOUT_LDOVINT - LDOVINT_NTC
6-11 Pull-up - PB_P
7-10 Pull-down - EN_PB_VSENSE
8-9 VIO - SREF