SLVUCX5 May 2024
There are four headers available to configure the EVM functions. Header J22 configures controller and target mode of operation. Header J20, as shown in the silk screen picture in Figure 3-2, is used to configure the EVM to match the feature setting written to the LP8769x-Q1 configuration registers. J32 is used to select the PMIC IO voltage, either 1.8V or 3.3V. The fifth header is J25 which allows VCCA to be powered from the USB connection and the configuration of GPIO2, I2C2 or SPI.
Option Pins | Configuration | Description | |
---|---|---|---|
SPI_EN | Open (Default) | I2C Mode. The signal path for I2C communication between the MCU and the PMIC is enabled. | |
Closed | SPI mode. The signal path for SPI communication between the MCU and the PMIC is enabled. | ||
GPIO3, SDA2/SDO | Open (Default) | GPIO mode. GPIO2 from PMIC is connected to PM7 of the MCU through a level translator. | |
GPIO3,SDA2/SDO: Closed | I2C Mode (J20 VIO, I2C/SPI: Open) | Q&A Watchdog mode. GPIO3 of the PMIC must be in the Alternative function to support the Q&A Watchdog and the I2C mode is selected. This setting must also be done on connector J25 by closing GPIO2 to SCL2/CS if I2C2 is wanted to be used. | |
SPI mode (J20 VIO, I2C/SPI: Closed) | SPI mode, Chip Select. GPIO2 and GPIO3 of the PMIC must be in the Alternative function to support SPI communication. This setting must also be done on connector J25 by closing GPIO2 to SCL2/CS if I2C2 is wanted to be used. | ||
GPIO6, nERR_MCU, GPIO7 | Open (Default) | GPIO mode. GPIO6 of the PMIC is connected to PP5 of the through a level translator. | |
GPIO6, nERR_MCU Closed | System error count down input signal from the MCU. VIO select must be 3.3V. GPIO6 or GPIO7 of the PMIC must be in the Alternative function to support the system error count down from the MCU. | ||
nERR_MCU, GPIO7 Closed | |||
GPIO2, TRIG_WDG, GPIO4 | Open (Default) | GPIO mode. GPIO7 of the PMIC is connected to PH0 of the through a level translator. | |
GPIO2, TRIG_WDG Closed | Trigger signal for trigger mode watchdog. VIO Select must be 3.3V. GPIO7 or GPIO6 of the PMIC must be in the Alternative function to support the trigger mode watchdog signal. | ||
TRIG_WDG, GPIO4 Closed |
Configuration | Description |
---|---|
Open | Not allowed for single or controller EVM, 1.8V or 3.3V must be selected. Leave open on target EVM. |
VIO Select, 3.3V: Closed (Default) | VIO is 3.3V |
VIO Select, 1.8V: Closed | VIO is 1.8V |
Configuration | Description | |
---|---|---|
3.3V, VCCA: Closed (Default) | 3.3V from TLV733P-Q1 (U11) is connected to VCCA. The input for U11 is the 5V from the USB connection (VBUS). VBUS is not intended to support heavy load conditions. 2 W must be the maximum power drawn from the USB. | |
EN_5V0, 3.3V, VCCA, 5.0V Open | On board 5V regulator is disabled and VCCA isolated from other on board supplies. VCCA must be powered from J9. | |
EN_5V0, 3.3V: Closed | 5V on board regulator (powered from USB) is enabled. 5V regulated supply can be used to power VCCA. | |
VCCA, 5.0V: Closed | 5V on board regulator (powered from USB) is connected to the LP8769-Q1 VCCA. 5V on board regulator is not intended for heavy load condition. | |
SCL2/CS, GPIO2: Open | GPIO mode. GPIO2 of the PMIC is connected to IO2 of the MCU. | |
SCL2/CS, GPIO2: Closed (Default) | I2C mode (J22 SPI_EN: Open) | Q&A Watchdog mode. GPIO2 and GPIO3 of the PMIC must be in the Alternative function to support the Q&A Watchdog and the I2C mode selected. This setting must also be done on connector J20 by closing GPIO3 to SDA2/SDO if I2C2 is wanted to be used. |
SPI mode (J22 SPI_EN: Closed) | SPI mode, Chip Select. GPIO2 and GPIO3 of the PMIC must be in the Alternative function to support SPI communication. This setting must also be done on connector J20 by closing GPIO3 to SDA2/SDO. |