SLVUCX5 May   2024

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Getting Started
      1. 2.1.1 Getting Started: Single EVM
      2. 2.1.2 Getting Started: Multiple EVM Evaluation
    2. 2.2 EVM Details
      1. 2.2.1 Terminal Blocks
      2. 2.2.2 Test Point Descriptions
      3. 2.2.3 Configuration Headers
      4. 2.2.4 Stack-up Headers
      5. 2.2.5 Connectors
      6. 2.2.6 Dip Switches
      7. 2.2.7 EVM Control and GPIO
    3. 2.3 Customization
      1. 2.3.1 Changing the Communication Interface
      2. 2.3.2 Changing the Phase Configuration
  9. 3Software
    1. 3.1 GUI Tool
  10. 4Hardware Design Files
    1. 4.1 Schematics
    2. 4.2 PCB Layouts
    3. 4.3 Bill of Materials (BOM)
  11. 5Additional Information
    1. 5.1 Additional Resources
    2. 5.2 Trademarks

1.4 Device Information

Table 2-2 shows the available controller and target EVM, the silicon associated with the EVM, the initial non-volatile memory (NVM) configuration, and the hardware components associated with the configuration. Because of the configurable nature of both the part and the EVM, any EVM can be configured as a controller or target device.

Table 1-2 EVM Description
EVM Part Number PMIC Device Part Number NVM Phase Configuration fSW Populated phase components
R1-R7 J3-J8
LP87694Q1EVM LP876940C0RQKRQ1 1+1+1+1-phase, 4-output: BUCK1, BUCK2, BUCK3, BUCK4 2.2MHz R1, R3, R4 and R7 -