Greater integration

Another trend in data centers is clock integration, which enables greater reliability, smaller size and lower cost. Area reduction is especially important on daughtercards, where space is limited.

One important step when integrating is to eliminate the external crystal resonator (XTAL) or crystal oscillator (XO). Some vendors provide ICs with integrated XTAL, but this integration has some disadvantages. First of all, crystal integration typically requires a special land-grid-array (LGA) package that has substrate inside, instead of the much simpler, industry-preferred quad flat no-lead (QFN) package. LGA packages cost more and are bad for solder inspection. Besides, stacking the crystal on top of the base die increases the package height. For example, a regular QFN package is only 0.9 mm high. With crystal integrated, the package becomes as tall as 1.7 mm, which can become a concern for casing.

Integrating BAW avoids all of these problems. BAW not only provides sub-65-fs RMS jitter, but it is very small and low cost as well. Putting the BAW die on top of the base die does not require an LGA package; a regular 0.8-mm or 0.9-mm QFN package height is sufficient. Therefore, the cost of BAW integration is much lower than crystal integration. BAW is also less sensitive to vibration and has better aging performance and a much lower failure rate compared to crystals. Data and details can be found in references [2] and [3].

Integration also enables designers to combine buffers, multiplexers and local clocks. A single integrated circuit can generate local PCIe clocks, buffer or multiplex external PCIe clocks, and level-translate 1-PPS signals at the same time. Instead of using multiple clock generators, multiplexers, buffers and oscillators, one clock generator can meet all of your clocking needs.