SNAU259
August 2021
LMK1D1208
Trademarks
1
Features
2
General Description
3
Signal Path and Control Circuitry
4
Getting Started
5
Power Supply Connection
6
Input Clock Selection
6.1
Differential Input
6.2
Configuring Single-Ended Input
7
Output Clock
8
EVM Board Schematic
9
REACH Compliance
10
Bill of Materials
1
Features
Easy-to-use evaluation board to fan out low-phase noise clocks
Simple, fast device configuration and setup
Control pin(s) configurable through jumpers
Single supply input powered at either 1.8 V, 2.5 V, or 3.3 V
Differential or single-ended input clocks accepted
EVM supports four differential LVDS outputs. Both output banks are available for testing