SNAU266A July   2021  – August 2022

 

  1.   Abstract
  2. 1First-Time Setup
    1. 1.1 Evaluation Module Contents
    2. 1.2 Evaluation Setup Requirements
  3. 2EVM Connections
    1. 2.1 Connection Diagram
    2. 2.2 Power Supply
    3. 2.3 Reference Clock
    4. 2.4 Output Connections
    5. 2.5 Programming Interface
  4. 3Feature Evaluation
    1. 3.1 Buffer, Divider, and Multiplier Modes
    2. 3.2 SYSREF Generation
    3. 3.3 SYSREF Delay Generators
  5. 4Schematic
  6. 5PCB Layout and Layer Stack-Up
    1. 5.1 PCB Layer Stack-Up
    2. 5.2 PCB Layout
  7. 6Bill of Materials
  8.   A Troubleshooting
  9.   B USB2ANY Firmware Upgrade
  10.   C Revision History

C Revision History

Changes from Revision * (July 2021) to Revision A (August 2022)

  • Changed board imageGo
  • Changed the supply voltage from 2.5 V to 3.3 VGo
  • Updated the power supply section and operating frequenciesGo
  • Updated the connection diagram with latest board imageGo
  • Changed phase noise plots for 6000-MHz and 3000-MHz operating frequencies Go
  • Updated schematicGo
  • Updated PCB layer stack up and layoutGo
  • Updated PCB layoutGo
  • Updated the Bill of Materials (BOM) tableGo