In applications such as phase array antenna where the phases of multiple synthesizers must be aligned, it would be beneficial if each synthesizer can phase-align its output and input without complex and time-precision circuitry. The LMX2820 is one of the RF synthesizers in TI's product portfolio that can support phase synchronization.
In this user's guide, we will explain the theory of phase synchronization, the limitations of phase synchronization, and demonstrate how to set up synchronization in a step-by-step guide.
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Phase synchronization of the LMX2820 means that the delay from the rising edge of the reference clock signal to the output signal is deterministic. If multiple LMX2820 devices share the same reference clock, it is possible to have all the outputs from LMX2820 devices phase-aligned. Depending on the input and output signal frequencies, a SYNC signal may be necessary to assist phase synchronization.
Initially, the LMX2820 devices are locked to the input reference clock (fOSCIN), but are not synchronized. The user sends a synchronization pulse that is reclocked to the next rising edge of fOSCIN. After a certain time (known as t1), the phase relationship from fOSCIN to fOUT will be deterministic. t1 is dominated by the sum of the VCO calibration time, the analog setting time of the PLL loop, and the register MASH_RST_COUNT, if used in fractional mode. t2 is the deterministic delay between fOSCIN and fOUT after synchronization.
The requirements for phase synchronization depend on certain LMX2820 setup conditions. To use phase synchronization, first determine the SYNC category using the flow chart below.
For Category 1 SYNC, there is no restriction at all. We do not need to enable SYNC mode (that is, we can keep register PHASE_SYNC_EN = 0). A SYNC signal is also not required.
In Category 2 SYNC, we must make PHASE_SYNC_EN = 1 and provide a SYNC signal to LMX2820. The SYNC signal is not time-critical, therefore a Low-to-High transition at the PSYNC pin is good enough.
When the LMX2820 configuration falls into Category 3 SYNC, we need both PHASE_SYNC_EN = 1 as well as a time-critical SYNC pulse. The setup and hold time of the SYNC pulse as specified in the data sheet must obey.
From the data sheet, the minimum tCS and tCH is 2.5 ns and 2 ns, respectively. Furthermore, the maximum fOSCIN is restricted to 200 MHz.
A reliable phase synchronization is not possible if the configuration of LMX2820 does not fall into the above categories.
In the following sections, we can see how to synchronize the outputs from two LMX2820 devices. Below is the block diagram of the test setup.
The LMK04832 is operated in Single Loop Mode. That is, PLL1 is not used. PLL2 takes the 100-MHz input clock to lock the VCO. Output from the VCO is divided down to 100 MHz, which is used as the reference clock of the LMX2820. SYSREF of the LMK04832 is used to generate a time-critical SYNC pulse for Category 3 SYNC.
The LMK04832 is able to phase align all of the output clocks. All the clocks and SYNC pulses are phase-aligned before feeding them to the LMX2820 devices.
The output channel-to-channel skew of the LMK04832 is around 100 ps. As such, the two 100-MHz clocks are not exactly in phase. This skew is eventually carried forward to the output of the LMX2820 devices. For better illustration purpose, the data in the following sections has this skew written off.