SNAU298A October   2023  – October 2024

 

  1.   1
  2.   Description
  3.   Features
  4.   Applications
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2EVM Quick Start
    1. 2.1 Hardware Setup
    2. 2.2 Software Setup
      1. 2.2.1 TICS Pro GUI Setup
      2. 2.2.2 Power Up Sequence
    3. 2.3 EVM Measurements
  8. 3Hardware
    1. 3.1 Device Operation Modes
    2. 3.2 EVM Configuration
      1. 3.2.1 Power Supply
      2. 3.2.2 Logic Input and Outputs
      3. 3.2.3 Clock Input
      4. 3.2.4 Clock Outputs
      5. 3.2.5 Status Outputs, LEDs, and Test Points
  9. 4Software
    1. 4.1 TICS Pro LMKDB1120 Software
      1. 4.1.1 Input
        1. 4.1.1.1 Input Interface Type
        2. 4.1.1.2 Input Termination
        3. 4.1.1.3 Automatic Output Disable (AOD)
        4. 4.1.1.4 LOS Event
        5. 4.1.1.5 LOS Readback
      2. 4.1.2 Device Info and EVM Setup
        1. 4.1.2.1 Device Info
        2. 4.1.2.2 EVM Setup
        3. 4.1.2.3 SMBus
      3. 4.1.3 Output
        1. 4.1.3.1 SMBus
          1. 4.1.3.1.1 Programmable Output Slew Rate Control
        2. 4.1.3.2 OE Pin Control
        3. 4.1.3.3 Side Band Interface (SBI)
  10. 5Implementation Results
    1. 5.1 Typical Phase Noise Characteristic
  11. 6Hardware Design Files
    1. 6.1 Schematics
    2. 6.2 PCB Layouts
    3. 6.3 Bill of Materials (BOM)
  12. 7Compliance Information
    1. 7.1 Compliance and Certifications
  13. 8References
  14. 9Revision History

5.1 Typical Phase Noise Characteristic

The typical phase noise performance for 156.25MHz reference clock input using a SMA100B is shown in Figure 5-1.

LMKDB1120EVM was configured in cascaded mode to get these measurements:

  1. SMA100B → LMKDB1120EVM input. Then, LMKDB1120EVM to secondary LMKDB1120 EVM. This was done to get good slew rate at the input. Other methods like a clipping circuit can be used to get a desired slew rate and square wave form from the SMA100B.
  2. Outputs phase noise is measured through a Balun to convert the differential waveform from the LMKDB1120 into a single-ended waveform for a phase noise analyzer.

    As shown below in Figure 5-1, reference input jitter is 36.7 fs. The measured jitter on the output of LMKDB1120 is 43.7 fs is shown in Figure 5-2. Calculated typical additive jitter is about 24 fs for the LMKDB1120.

LMKDB1120EVM Reference Clock Input Phase Noise Figure 5-1 Reference Clock Input Phase Noise

LMKDB1120EVM LMKDB1120 Output Clock Phase Noise

Figure 5-2 LMKDB1120 Output Clock Phase Noise