SNLA224A June 2014 – January 2024 DS90UB913A-Q1 , DS90UB954-Q1 , DS90UB960-Q1
PoC networks must be designed with the integrity of the high-speed signal in mind. The network cannot interfere with data transmission, and the DC signal must have as little noise as possible. Noise seen on the PoC voltage supply and the deserializer RIN+ pin are particularly important and must remain below the recommended conditions. Figure 4-1 shows the measurement nodes of the VPoC and RIN+ noise relative to the system.