SNLA423 March 2023 DP83826E
Read the registers and verify the default values shown in the data sheet. Note that the initial values of some registers can vary based on strap options.
The expected register values for PHY operation and link in 10/100 Mbps with auto-negotiation enabled are shown below.
REGISTER ADDRESS | REGISTER VALUE | |
---|---|---|
10 Mbps | 100 Mbps | |
0x0000 | 3100 | 3100 |
0x0001 | 786D | 786D |
0x0002 | 2000 | 2000 |
0x0003 | A130 | A130 |
0x0004 | 0041 | 01E1 |
0x0005 (1) | 41E1 | 41E1 |
0x0006 | 0007 | 0007 |
0x0007 | 2001 | 2001 |
0x0008 | 0000 | 0000 |
0x0009 | 0000 | 0000 |
0x000A | 0100 | 0100 |
0x000B | 0000 | 0000 |
0x000D | 0000 | 0000 |
0x000E | 0000 | 0000 |
0x000F | 0000 | 0000 |
0x0010 (2) | 4717 or 0017 | 4715 or 0715 |
0x0011 | 0108 | 0108 |
0x0012 | 7400 | 7400 |
0x0013 | 2800 | 2800 |
0x0014 | 0000 | 0000 |
0x0015 | 0000 | 0000 |
0x0016 | 0100 | 0100 |
0x0017 | 0041 | 0041 |
0x0018 | 0480 | 0480 |
0x0019 | C000 | CC00 |
0x001A | 0000 | 0000 |
0X001B | 007D | 007D |
0X001B | 05EE | 05EE |
0X001C | 0000 | 0000 |
0x001E | 0002 | 0102 |
With the PHY linked in a given speed, use these values as a reference to identify any variance from the expected operation. Note that not all registers need to be the same, for example .
Example: After powering and linking the PHY in 10 Mbps, register 0x0010 is read at hex value 0017. Meaning Bits [4, 2, 1, 0] are high. These bits confirm: Auto-Negotiation is complete, Full-Duplex, 10 Mbps Mode, and valid link established.
Repeating this process for any values distinct from the expected values shown in the table will help diagnose the exact state of the PHY for any encountered issues.