SNLA425A february 2023 – june 2023 DS160PR1601 , DS320PR1601
This document provides a programming reference for the DS160PR1601 16-Lane PCI-Express Gen-4 Linear Redriver and the DS320PR1601 16-Lane PCI-Express Gen-5 Linear Redriver. This document contains detailed information related to the DS160PR1601 and DS320PR1601 advanced configuration options. The intended audience includes software engineers working on system diagnostics and control software.
TI recommends that the reader be familiar with the DS160PR1601 16 Gbps 16-Lane Linear Redriver for PCIe 4.0 Data Sheet for DS160PR1601 users, or the DS320PR1601 32 Gbps 16-Lane Linear Redriver for PCIe 5.0 Data Sheet for DS320PR1601 users. These documents and all other collateral data related to the DS160PR1601 redriver and DS320PR1601 redriver (application notes, models, and so forth) are available to download from the TI website. Alternatively, contact your local Texas Instruments field sales representative.
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There are two ways to access the DS160PR1601 and DS320PR1601 registers. The two methods are:
The DS160PR1601 and DS320PR1601 consist of eight individual I2C addresses to configure all 16 lanes of the redriver. Each address pair configures 8 channels.
| x_ADDR1_x Pin Level | x_ADDR0_x Pin Level | Bank 0: Channels 0-3: 7-Bit Address [HEX] | Bank 1: Channels 4-7: 7-Bit Address [HEX] |
|---|---|---|---|
| L0 | L0 | 0x18 | 0x19 |
| L0 | L1 | 0x1A | 0x1B |
| L0 | L2 | 0x1C | 0x1D |
| L0 | L3 | 0x1E | 0x1F |
| L0 | L4 | Reserved | Reserved |
| L1 | L0 | 0x20 | 0x21 |
| L1 | L1 | 0x22 | 0x23 |
| L1 | L2 | 0x24 | 0x25 |
| L1 | L3 | 0x26 | 0x27 |
| L1 | L4 | Reserved | Reserved |
| L2 | L0 | 0x28 | 0x29 |
| L2 | L1 | 0x2A | 0x2B |
| L2 | L2 | 0x2C | 0x2D |
| L2 | L3 | 0x2E | 0x2F |
| L2 | L4 | Reserved | Reserved |
| L3 | L0 | 0x30 | 0x31 |
| L3 | L1 | 0x32 | 0x33 |
| L3 | L2 | 0x34 | 0x35 |
| L3 | L3 | 0x36 | 0x37 |