SNLA445 November   2023 LMK6H

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Test Setup
  6. 3Test Procedure
  7. 4Explanation of TI's PCIe Compliance Tool
  8. 5LMK6H Test Results
    1. 5.1 LMK6H Test Results Summary
    2. 5.2 PCIe Tool Input File Waveforms for the LMK6H
    3. 5.3 LMK6H Detailed Jitter Measurements
  9. 6Summary
  10. 7References

Test Setup

TI’s PCIe Compliance Reports display the analysis of a device’s phase noise or jitter in regards to meeting PCIe requirements. This PCIe compliance report displays test results under typical conditions at 25°C ambient temperature and a supply voltage of 3.3 V.

The hardware setup consists of a device under test, power supply, balun (for frequency domain measurement only), test load board, and phase noise analyzer (PNA, for frequency domain measurement) or oscilloscope (for time domain measurement). For frequency domain measurements, the differential outputs of the device are connected to a balun to convert them to a single-ended signal which is routed to a PNA, as shown on Figure 2-1.

GUID-20231109-SS0I-CPWN-F3CB-5TFSQTKCX6NM-low.svgFigure 2-1 TI's PCIe Compliance Test Hardware Setup for Frequency Domain Measurements

For time domain measurements, the differential outputs (both positive and negative pins) of the device are routed directly to an oscilloscope, as shown on Figure 2-2. Also, when obtaining data for the time domain measurements, the PCIe test load is a 15 dB loss trace at 4 GHz.

GUID-20231109-SS0I-LNTK-D2NH-GVGW9XFBRMBT-low.svgFigure 2-2 TI's PCIe Compliance Test Hardware Setup for Time Domain Measurements