FPD-Link camera designs often undergo rigorous automotive EMC testing during OEM qualification. As camera systems in the vehicle have taken on greater responsibility within the vehicle's safety architecture, robustness requirements for those qualifications have become far more stringent as well. Many OEM customers demand error free performance under various high-stress electrical conditions including conducted interference, radiated interference, and even during ESD strikes to the modules, connectors, or cables. This application note can outline key design guidelines that an FPD-Link system designer can implement in both hardware and software design to maximize system level ESD performance.
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System level ESD testing is a common requirement across a wide range of global automotive OEM. The goals of system level ESD testing are typically two-fold: to make sure that the electrical components within the module do not sustain damage, and to evaluate application level performance during the ESD events. A common misconception regarding system level ESD testing is that the application level performance can relate to the specified ESD ratings in a component data sheet (example. IEC 6100-4-2, HBM, CDM, etc.) The data sheet specified ESD ratings only describe the IC capability to withstand energy discharge to the pins of the device without sustaining damage. This rating is primarily useful for understanding the chip handling and assembly requirements, but critically the rating does not take into account any aspect of application level performance such as data loss. Understand that the application level performance of high speed copper links under EMI/ESD stress is heavily related to the system design. This guide includes TI's recommendations for maximizing immunity performance through strong hardware design practice and software settings optimization.