SNLA474A October   2024  – October 2024 DS90UB971-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. Introduction
  5. Typical Test Standards Overview
    1. 2.1 ISO 10605 Standard
    2. 2.2 Performance Status Categorization
  6. FPD-Link Hardware Optimizations
    1. 3.1 Connector Grounding
    2. 3.2 PCB to Enclosure Grounding
    3. 3.3 MODE Selection
  7. FPD-Link Software Optimizations
    1. 4.1 LOCK Detection Tuning
    2. 4.2 Parity Error Handling
    3. 4.3 Forward Error Correction
      1. 4.3.1 FEC Test Capabilities
  8. Optimization Test Data
    1. 5.1 Baseline Hardware - No Software Optimization
    2. 5.2 Optimized Hardware - No Software Optimization
    3. 5.3 Optimized Hardware and Software
  9. Example Scripts for Software Optimization
  10. Additional System Level Software Options
  11. Summary
  12. References
  13. 10Revision History

PCB to Enclosure Grounding

One of the most important aspects of the system design to mitigate the effects of ESD on performance is to provide low inductance discharge paths to direct energy away from the high speed signals. One of the most effective methods to achieve this is to provide strong contact between the PCB ground and the enclosure which is connected to chassis ground. The implementation of an exposed ground ring around the PCB perimeter can give the enclosure multiple points of contact to the board ground via spring connections, or conductive screws and fasteners. Both sides of the PCB need to be in contact with the enclosure ground through a low inductance connection. This helps prevent ground bounce within local sections of the board.

 Enclosure Ground Ring Example Figure 3-2 Enclosure Ground Ring Example