SNLU226B February   2018  – April 2021 DS90UB960-Q1

 

  1. 1 Introduction
  2. 2 Features
  3. 3 Application Diagram
  4. 4 Major Components
  5. 5 Quick Start Guide
  6. 6 Board Connections
    1. 6.1 Power Supply
    2. 6.2 Power Over Coax Interface
    3. 6.3 MIPI CSI-2 Output Signals
    4. 6.4 FPD-Link III Signals
    5. 6.5 I2C Interface
    6. 6.6 Control Interface
  7. 7 Enable and Reset
  8. 8 ALP Software Setup
    1. 8.1  System Requirements
    2. 8.2  Download Contents
    3. 8.3  Installation of the ALP Software
    4. 8.4  Startup - Software Description
    5. 8.5  Information Tab
    6. 8.6  Registers Tab
    7. 8.7  Registers Tab - Address 0x00 Selected
    8. 8.8  Registers Tab - Address 0x00 Expanded
    9. 8.9  Scripting Tab
    10. 8.10 Sample ALP Python Script
      1. 8.10.1 Initialization
  9. 9 Troubleshooting ALP Software
    1. 9.1 ALP Loads the Incorrect Profile
    2. 9.2 ALP does not detect the EVM
  10. 10Typical Connection and Test Equipment
  11. 11Termination Device
  12. 12Typical Test Setup
  13. 13Equipment References
  14. 14Cable References
  15. 15Bill of Materials
  16. 16PCB Schematics
  17. 17Board Layout
  18. 18Revision History

6.3 MIPI CSI-2 Output Signals

Provided on the DS90UB960-Q1EVM, J1 and J3 are Samtec QSH-type connectors that can be mated with a matching QTH type connector on the top. This Samtec connector provides a means to route CSI-2 signals out of the DS90UB960-Q1. The J1 and J3 corresponds to CSI0 Port and CSI1 Port output connection signals respectively, and includes access to I2C and other miscellaneous GPIO signals. Zero ohm resistor pads are available if a connection to other signals is required. The mating connector part number is QTH-020-01-H-D-DP-A.

There are third party solutions like the HDR-128291-XX breakout board from Samtec which can be used. The HDR- 128291-XX is a breakout board with a mating connector to J1 & J3 and standard SMA male connectors. More info on this breakout board can be obtained from Samtec website. Another third party option is the ZX100 by Zebax Technologies. More information on this board can be obtained from Zebax website.

Table 6-4 MIPI CSI-2 (TX Port 0) Output Signals - J1 Pinout
Pin #Signal NamePin #Signal Name
1NC2EXT_SCL0
(I2C_SCL or I2C_SCL2)
3NC4EXT_SDA0
(I2C_SDA or I2C_SDA2)
5CSI0_CLK_P6NC
7CSI0_CLK_N8NC
9CSI0_D0_P10EXP_REF_CLK0
(REFCLK)
11CSI0_D0_N12GND
13CSI0_D1_P14RESETn_0
(PDB)
15CSI0_D1_N16GND
17CSI0_D2_P18SPI_MOSI_0
(GPIO0 or GPIO3)
19CSI0_D2_N20SPI_SCLK_0
(GPIO1 or GPIO4)
21CSI0_D3_P22SPI_CSn_0
(GPIO2 or GPIO5)
23CSI0_D3_N24GND
25NC26NC
27NC28NC
29NC30VDD_3V3
31NC32VDD_3V3
33NC34VDD_3V3
35NC36VDD_3V3
37NC38VDD_1V8
39NC40VDD_1V8
Table 6-5 MIPI CSI-2 (TX Port 1) Output Signals - J3 Pinout
Pin #Signal NamePin #Signal Name
1NC2EXT_SCL1
(I2C_SCL or I2C_SCL2)
3NC4EXT_SDA1
(I2C_SDA or I2C_SDA2)
5CSI1_CLK_P6NC
7CSI1_CLK_N8NC
9CSI1_D0_P10EXP_REF_CLK1
(REFCLK)
11CSI1_D0_N12GND
13CSI1_D1_P14RESETn_1
(PDB)
15CSI1_D1_N16GND
17CSI1_D2_P18SPI_MOSI_1
(GPIO0 or GPIO3)
19CSI1_D2_N20SPI_SCLK_1
(GPIO1 or GPIO4)
21CSI1_D3_P22SPI_CSn_1
(GPIO2 or GPIO5)
23CSI1_D3_N24GND
25NC26NC
27NC28NC
29NC30VDD_3V3
31NC32VDD_3V3
33NC34VDD_3V3
35NC36VDD_3V3
37NC38VDD_1V8
39NC40VDD_1V8
Table 6-6 MIPI CSI-2 Output Signals - J2 Pinout
Pin #Signal NamePin #Signal Name
1NC2EXP_SCL0
(I2C_SCL or I2C_SCL2)
3NC4EXP_SDA0
(I2C_SDA or I2C_SDA2)
5CSI0_CLK_P6NC
7CSI0_CLK_N8NC
9CSI0_D0_P10EXP_REF_CLK0
(REFCLK)
11CSI0_D0_N12GND
13CSI0_D1_P14RESETn_0
(PDB)
15CSI0_D1_N16GND
17CSI0_D2_P18SPI_MOSI_0
(GPIO0 or GPIO3)
19CSI0_D2_N20SPI_SCLK_0
(GPIO1 or GPIO4)
21CSI0_D3_P22SPI_CSn_0
(GPIO2 or GPIO5)
23CSI0_D3_N24GND
25CSI1_CLK_P26NC
27CSI1_CLK_N28NC
29CSI1_D0_P30VDD_3V3
31CSI1_D0_N32VDD_3V3
33CSI1_D1_P34VDD_3V3
35CSI1_D1_N36VDD_3V3
37NC38VDD_1V8
39NC40VDD_1V8
Note:

* Remove R7, R9, R11, R12, R15, R16, R17, R19, R21, R22, R25, R27, R31, R33, R35, R37, R40 and R42 for CSI-2 source connected to J1/J3 (Default) *

** Populate R7, R9, R11, R12, R15, R16, R17, R19, R21, R22, R25, R27, R31, R33, R35, R37, R40 and R42 when source connected through J2 **