SNLU237A September   2018  – January 2024 DP83869HM

 

  1.   1
  2.   DP83869EVM
  3.   Trademarks
  4. 1Definitions
  5. 2Introduction
    1. 2.1 Key Features
    2. 2.2 Quick Setup
      1. 2.2.1 Onboard Power Supply Operation
      2. 2.2.2 External Power Supply Operation
      3. 2.2.3 Software
        1. 2.2.3.1 MSP430 Driver
        2. 2.2.3.2 USB-2-MDIO Software
  6. 3Board Setup Details
    1. 3.1 Block Diagram
    2. 3.2 EVM High-Level Summary
  7. 4Configuration Options
    1. 4.1 Bootstrap Options
      1. 4.1.1 Straps for PHY Address
      2. 4.1.2 Strap for DP83869 Functional Mode Selection
      3. 4.1.3 Straps for RGMII/SGMII to Copper
      4. 4.1.4 Straps for RGMII to 1000Base-X
      5. 4.1.5 Straps for RGMII to 100Base-FX
      6. 4.1.6 Straps for Bridge Mode (SGMII-RGMII)
      7. 4.1.7 Straps for 100 M Media Converter
      8. 4.1.8 Straps for 1000 M Media Convertor
    2. 4.2 SGMII/Fiber Interface
    3. 4.3 RGMII
    4. 4.4 Clock Output
    5. 4.5 Clock Input
    6. 4.6 Switch Configuration Options
  8. 5Schematics
  9. 6Revision History

4.4 Clock Output

The EVM has a SMB connector to output clock from the PHY. A 50-Ω Coax cable with a SMB connector needs to be used for accessing the clock output.