SNLU350 September   2024

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5.   Trademarks
  6. 1Evaluation Module Overview
    1.     Preface: Read This First
      1. 1.1.1 Sitara MCU+ Academy
      2. 1.1.2 If You Need Assistance
    2. 1.1 Introduction
    3. 1.2 Kit Contents
    4. 1.3 Specifications
    5. 1.4 Device Information
  7. 2Hardware
    1. 2.1 Power Tree
    2. 2.2 Test Points
  8. 3Hardware Design Files
    1. 3.1 Schematics
    2. 3.2 PCB Layouts
    3. 3.3 Bill of Materials (BOM)
  9. 4Revision History

PCB Layouts

Figure 3-1 through Figure 3-4 show the design of the DP83TG720-IND-SPE EVM using a six-layer PCB with 2oz copper thickness.

DP83TG720 Top Overlay Figure 3-5 Top Overlay
DP83TG720 Top Solder Figure 3-6 Top Solder
DP83TG720 Layer 1 Figure 3-7 Layer 1
DP83TG720 Layer 2 Figure 3-8 Layer 2
DP83TG720 Layer 3 Figure 3-9 Layer 3
DP83TG720 Layer 4 Figure 3-10 Layer 4
DP83TG720 Layer 5 Figure 3-11 Layer 5
DP83TG720 Layer 6 Figure 3-12 Layer 6
DP83TG720 Layer 7 Figure 3-13 Layer 7
DP83TG720 Layer 8 Figure 3-14 Layer 8
DP83TG720 Bottom Solder Figure 3-15 Bottom Solder
DP83TG720 Bottom Overlay Figure 3-16 Bottom Overlay
DP83TG720 Drill Drawing Figure 3-17 Drill Drawing
DP83TG720 M2 Board Dimensions Figure 3-18 M2 Board Dimensions