SNOAA72A May   2021  – January 2022 LMP7704-SP , TL1431-SP

 

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Design Notes

  • Typically, when designing a TEC system, the first steps are to identify the heat load (usually power rating) of the system and the desired ΔT between the hot side and cold side. Once these specifications are determined, then the TEC can be selected. Once a TEC is selected, it is important to identify the rated Imax and Vmax. Note that Imax and Vmax­ are not the maximum ratings before the TEC is damaged; rather, they are the maximum ratings before the heat generated by the TEC starts to degrade the heating or cooling performance.
  • To operate the H-bridge correctly and control the current going through the TEC, one channel of the LMP7704-SP (U1A) is used as a bidirectional current-sense amplifier, which measures the current through the TEC. There is also a DC reference generated by another channel of the LMP7704-SP (U1B) to account for the negative current since it is assumed that the amplifier is operated from a single positive supply. A control amplifier (U1C) utilizes the output of the bidirectional current-sense amplifier (U1A) as feedback in conjunction with a control input signal (DAC, PID, and so forth) to determine the drive level of the H-bridge. The control input signal sets the desired current level through the TEC. The control amplifier is also responsible for driving the half-bridge on the right side. The gate driver (U1D) is responsible for driving the half-bridge on the left side. There are two things to note:
    1. U1D is DC biased by a TL1431-SP (U2) voltage reference which defaults the output of U1D to a high voltage. As the output of U1C increases, the output of U1D will decrease (larger inverting signal).
    2. When the N-channel FET (low-side) on one half-bridge is ON (Q2 or Q4), the P-channel FET (high-side) of the opposite half-bridge will be ON as well (Q3 or Q1). This allows for current to flow in both directions based on which diagonal pair of FETs is turned ON.
  • The LMP7704-SP supply voltage of 10V was selected according to the derating specifications provided by the National Aeronautics and Space Administration (NASA) in document EEE-INST-002 (April 2008) and the European Cooperation for Space Standardization (ECSS) in document ECSS-Q-ST-30-11C Rev.1 (4 October 2011). The documents specify an 80% and 90% derating of the absolute maximum supply voltage for linear ICs, respectively.
  • For proper operation, the power supplies must be decoupled. For supply decoupling, TI recommends placing 10-nF to 1-µF capacitors as close as possible to the operational-amplifier power supply pins. For the single supply configuration shown, place a capacitor between the V+ and V– supply pins. Bypass capacitors must have a low ESR of less than 0.1Ω.