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The TLV3801EVM is an evaluation board designed to evaluate the high-speed TLV3801 comparator. The TLV3801EVM has layout options intended to make it simple to evaluate timing performance with different measurement tools. The output of the TLV3801 is designed for low-voltage differential signals (LVDS), which provide high-speed signals to interconnect devices such as FPGAs with minimal power dissipation.
Comparing the device pin assignments to the EVM designations, it is clear that the TLV3801 does not have "VEE_In" and "VEE_Out" pins. The "VEE_In" EVM designation corresponds to the VEE pin on the device. This pin establishes the lower limit for the input common mode range. The minimum input to the device is VEE + 1.5 V.
The "VEE_Out" designator for the EVM corresponds to the GND pin on the TLV3801. The difference between the VCC pin and the GND pin is the output supply voltage. The recommended output supply voltage (VCC - GND) range is 2.4 V to 5.25 V.
When using a single supply, VEE_In (VEE pin) and VEE_Out (GND) are shorted to SYS_GND on the EVM. When a split supply configuration is used, then VEE_In is not shorted to SYS_GND and VEE_Out is. The split supply requirements are as follows: VCC - VEE (applies to VEE_In) has a range of 2.7 V to 5.5 V and VCC - GND has a range of 2.4 V to 5.25 V.