SNOU206 October   2024 LMG2640

 

  1.   1
  2.   Description
  3.   Features
  4.   Applications
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
    5. 1.5 General TI High Voltage Evaluation User Safety Guidelines
      1. 1.5.1 Safety and Precautions
  7. 2Hardware
    1. 2.1 LMG2640EVM-090 Daughter Card
      1. 2.1.1 Test Points
      2. 2.1.2 Integrated Current Sensing
      3. 2.1.3 Enable Pin
      4. 2.1.4 FAULT
      5. 2.1.5 Power Pins
      6. 2.1.6 Heat Sink
    2. 2.2 Motherboard
      1. 2.2.1 Bias Supply
      2. 2.2.2 PWM Input
      3. 2.2.3 Fault Protection
    3. 2.3 Recommended Footprint
    4. 2.4 Test Equipment
    5. 2.5 Test Procedure When Paired With LMG342X-BB-EVM
      1. 2.5.1 Setup
      2. 2.5.2 Start-Up and Operating Procedure
      3. 2.5.3 Test Results
      4. 2.5.4 Shutdown Procedure
      5. 2.5.5 Additional Operating Notes
  8. 3Hardware Design Files
    1. 3.1 LMG2640EVM-090 Schematic
    2. 3.2 Motherboard Schematic
    3. 3.3 PCB Layout
    4. 3.4 Bill of Materials
  9. 4Additional Information
    1. 4.1 Trademarks
  10. 5Related Documentation

2.1.6 Heat Sink

The heat sink is installed to help with heat dissipation of the LMG2640. Exposed copper pads are attached to the die attach pad (DAP) on the high-side and low-side devices to provide a low thermal impedance point for the heat sink. The two copper pads have a high-voltage potential difference between them, therefore an electrically isolated thermal interface material (TIM) is required.

For best thermal dissipation and board level reliability, recommendations for thermal via pattern and solder paste example are provided in the LMG2640 Integrated 650V GaN Half Bridge data sheet. Pin numbers 1, 13, 17, 21, 33, 37, and 40 are NC (no connection) which are used to anchor QFN package to PCB. These pins must be soldered to PCB landing pads which have to be non-solder mask defined pads and must not be physically connected to any other metal on the PCB. Internally, pins 1 and 13 are connected to DH and pins 17, 21, 37 are connected to AGND, SL, and PADL. Pin 40 needs to be connected to PADH. All pads must be NSMD for mechanical performance, refer to the device data sheet for trace connection recommendations to the pads. Filling the thermal pad with thermal vias is recommended for thermal performance. Fill and planarize vias.

In this daughter card design, S05MZZ3S-A heat sink and GR80B, thermal interface material has been used. More details on thermal performance and comparison between different TIM are shown in Thermal Performance of QFN 12x12 Package for 600V GaN Power Stage application note.

LMG2640EVM-090 EVM (Top View) Figure 2-1 EVM (Top View)
LMG2640EVM-090 EVM (Bottom View) Figure 2-2 EVM (Bottom View)