Figure 1-1 shows the top-view diagram of the EVM along with basic connections. By default, EVM is configured to power up through VBAT supply through onboard 12 V VIN to 3.3 V VOUT pre-regulator. EVM can also be powered through external 3.3 V supply or through USB port. Please refer to Table 3-2 for the right jumper configuration for each power-supply input.

LP87745-Q1 device works with 3.3 V input supply and supply is internally monitored for undervoltage (UV) and overvoltage (OV) conditions and hence keep the input supply voltage within 3.3 V +/- 8 % to avoid input supply UV/OV detection. Input power plane to the PMIC has option for additional filtering using L1 and L2 on the bottom side of the PCB.

• If the VBAT/preregulator path is used (default configuration), input supply to the device is already regulated to 3.3 V.
• If external 3.3 V supply is used, ensure that input supply voltage is always within the recommended voltage range and drop across supply path must be considered.
• If EVM is configured to work with USB supply, regulators should not be loaded.

Table 2-1 lists the input and output voltage for each regulator and their maximum load-current requirements. Refer LP87745-Q1 device data sheet for more information about device electrical characteristics and its features.

If all the regulators are loaded with maximum load current simultaneously, PMIC and PCB can become hot. Make sure that PMIC junction temperature does not exceed 150 °C.

LP877451Q1EVM has many terminal blocks, jumpers and test points to offer certain flexibility to help users to verify the EVM according to their application conditions. However, the EVM is pre-configured with default jumper settings and users can power up the regulators without the need of jumper modifications. Setting these jumpers correctly for the correct function of the EVM is important. Table 3-1 lists all the terminal blocks on the EVM and Table 3-2 lists the jumpers and their functionality. All the terminal blocks are marked with polarity and Pin 1 of test points / jumpers are marked with white dot for identification purpose. To understand more about the jumper functionality, see the schematic diagrams in Section 6.1.

Table 3-3 lists all the available connectors on the EVM.

In its default configuration, connecting +12 V and GND to the VBAT terminal block (J33) will power up the EVM. While loading the regulators, ensure that input power supply has sufficient current source capabilities to avoid supply voltage collapse due to current limiting.

EVM can also be powered through external 3.3 V input supply or through USB power by modifying jumper settings on the EVM. Table 4-1 describes the jumper settings for different supply options.

The LP877451Q1EVM does not require any specific power-down sequence. The EVM can be powered down by turning off the power supply or by toggling the EN Pin off in the GUI, if the GUI control signal is used to enable/disable the device. Refer to Table 3-2 and GUI section for more information about configuring jumpers and using GUI.

Texas Instruments provides a simple to use LP87745-Q1 GUI tool to enable, configure, and evaluate the various features of the LP87745-Q1 device on the EVM. Please refer to the GUI README.md file in the GUI tool's Help->View README.md tab for a more detailed description of this tool.

The GUI will run on most PC platforms and requires a USB port for connecting the EVM to the host computer. The EVM USB connector is type-C and a type-A to type-C cable is provided along with the EVM to connect to the host computer. EVM will get automatically connected to the GUI after the USB cable is connected and manual assignment of COM port is not necessary. If Hardware not Connected displays on the bottom left of the GUI, clicking Click to connect to hardware icon next to it will re-establish the connection. The GUI uses the ACCtrl COM port which can be found from the device manager of the operating system.

The GUI can be found here and it can be run in browser or it can be installed to the computer. Figure 4-1 shows the default interface of GUI. Please refer to the README.md file in the GUI tool for a complete guide on how to use the tool.

The EVM can be configured in the configuration page shown in Figure 4-2. By default, all the configuration registers are locked and CRC protected. Clicking the Unlock registers check box on the Configuration Page will automatically write REGISTER_LOCK_STATUS =0x9B to unlock the configuration registers for write operation. CRC can be disabled by writing CONFIG_CRC_EN = 0h through Console window (Options → Show Console) or GUI Register Map Page. For example, output voltages, startup and shutdown delays and peak current limits can be changed for each buck converter.

In the register map page shown in Figure 4-3, registers can be read or written to.

This section provides the basic overview of the SPI based Q&A watchdog algorithm implemented on the EVM. Please refer LP87745-Q1 device data sheet for more detailed information about device watchdog functionality. This watchdog requires specific SPI messages from the host MCU in specific time intervals to detect correct operation of the MCU. On the EVM, MSP432 MCU is used as a host MCU.

During operation, the device provides a 4-bit question for the MCU and the MCU calculates the required 32-bit answer. This answer is split into four answer bytes: Answer-3, Answer-2, Answer-1 and Answer-0. The MCU writes these answer bytes one byte at a time into WD_ANSWER[7:0] from the SPI interface.

A good event occurs when the MCU sends the correct answer-bytes calculated for the current question in the correct watchdog window and in the correct sequence. This sequence is visualized in Figure 5-1

A bad event occurs when one of the events that follows occur:

• The MCU sends the correct answer-bytes, but not in the correct watchdog window.
• The MCU sends incorrect answer-bytes.
• The MCU returns correct answer-bytes, but in the incorrect sequence.

Figure 5-1 Watchdog Sequence in Q&A Mode

In GUI, there are two sections in configuration tab for watchdog configurability. Figure 5-2 illustrates the watchdog validation section in GUI, where the delays between the WD Answers can be configured and watchdog status for different interrupts and errors can be observed. And if required status can be cleared through clear buttons available next to the each status. In the other watchdog configuration section, watchdog can be enabled or disabled along with other watchdog configurable parameters as shown in Figure 5-3. For further information on watchdog configuration, refer to the data sheet of LP8774x-Q1 https://www.ti.com/lit/pdf/SNVSBE7 for watchdog section.

This section contains the schematics, layout and the bill of materials for the LP87745Q1EVM.

This section includes images of the EVM schematics and different layers of the layout.

Table 6-1 lists all the components on the EVM.