SNVU859 June 2024 LP5813
Table 2-24 lists the memory-mapped registers for the LED_Enable registers. All register offset addresses not listed in Table 2-24 should be considered as reserved locations and the register contents should not be modified.
LED_EN_1 is shown in Figure 2-20 and described in Table 2-25.
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7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
led_en_b0 | led_en_a2 | led_en_a1 | led_en_a0 | led_en_3 | led_en_2 | led_en_1 | led_en_0 |
R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7 | led_en_b0 | R/W | 0h | LED_B0 Enable 0h = Disabled 1h = Enabled |
6 | led_en_a2 | R/W | 0h | LED_A2 Enable 0h = Disabled 1h = Enabled |
5 | led_en_a1 | R/W | 0h | LED_A1 Enable 0h = Disabled 1h = Enabled |
4 | led_en_a0 | R/W | 0h | LED_A0 Enable 0h = Disabled 1h = Enabled |
3 | led_en_3 | R/W | 0h | LED_3 Enable 0h = Disabled 1h = Enabled |
2 | led_en_2 | R/W | 0h | LED_2 Enable 0h = Disabled 1h = Enabled |
1 | led_en_1 | R/W | 0h | LED_1 Enable 0h = Disabled 1h = Enabled |
0 | led_en_0 | R/W | 0h | LED_0 Enable 0h = Disabled 1h = Enabled |
LED_EN_2 is shown in Figure 2-21 and described in Table 2-26.
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7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
led_en_d2 | led_en_d1 | led_en_d0 | led_en_c2 | led_en_c1 | led_en_c0 | led_en_b2 | led_en_b1 |
R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7 | led_en_d2 | R/W | 0h | LED_D2 Enable 0h = Disabled 1h = Enabled |
6 | led_en_d1 | R/W | 0h | LED_D1 Enable 0h = Disabled 1h = Enabled |
5 | led_en_d0 | R/W | 0h | LED_D0 Enable 0h = Disabled 1h = Enabled |
4 | led_en_c2 | R/W | 0h | LED_C2 Enable 0h = Disabled 1h = Enabled |
3 | led_en_c1 | R/W | 0h | LED_C1 Enable 0h = Disabled 1h = Enabled |
2 | led_en_c0 | R/W | 0h | LED_C0 Enable 0h = Disabled 1h = Enabled |
1 | led_en_b2 | R/W | 0h | LED_B2 Enable 0h = Disabled 1h = Enabled |
0 | led_en_b1 | R/W | 0h | LED_B1 Enable 0h = Disabled 1h = Enabled |