SNVU912 June   2024 LP87524-Q1

 

  1.   1
  2.   , , Technical Reference Manual
  3.   Trademarks
  4. 1Introduction
  5. 2Register Bits Loaded From OTP Memory
  6. 3Revision History

Register Bits Loaded From OTP Memory

Table 2-1 lists the register bit values loaded from the OTP memory during device start-up.

Table 2-1 Summary of Registers Bits
AddressRegister NameBitLP87241S-Q1 Value
0x01OTP_REVOTP_ID[7:0]0x19
0x02BUCK0_CTRL1EN_BUCK00x01
0x02BUCK0_CTRL1EN_PIN_CTRL00x01
0x02BUCK0_CTRL1BUCK0_EN_PIN_SELECT[1:0]0x00
0x02BUCK0_CTRL1BUCK0_FPWM0x01
0x02BUCK0_CTRL1BUCK0_FPWM_MP0x00
0x03BUCK0_CTRL2ILIM0[2:0]0x04
0x03BUCK0_CTRL2SLEW_RATE0[2:0]0x05
0x04BUCK1_CTRL1EN_BUCK10x01
0x04BUCK1_CTRL1EN_PIN_CTRL10x01
0x04BUCK1_CTRL1BUCK1_EN_PIN_SELECT[1:0]0x00
0x04BUCK1_CTRL1BUCK1_FPWM0x01
0x05BUCK1_CTRL2ILIM1[2:0]0x04
0x05BUCK1_CTRL2SLEW_RATE1[2:0]0x05
0x06BUCK2_CTRL1EN_BUCK20x01
0x06BUCK2_CTRL1EN_PIN_CTRL20x01
0x06BUCK2_CTRL1BUCK2_EN_PIN_SELECT[1:0]0x02
0x06BUCK2_CTRL1BUCK2_FPWM0x01
0x06BUCK2_CTRL1BUCK2_FPWM_MP0x00
0x07BUCK2_CTRL2ILIM2[2:0]0x05
0x07BUCK2_CTRL2SLEW_RATE2[2:0]0x05
0x08BUCK3_CTRL1EN_BUCK30x01
0x08BUCK3_CTRL1EN_PIN_CTRL30x01
0x08BUCK3_CTRL1BUCK3_EN_PIN_SELECT[1:0]0x02
0x08BUCK3_CTRL1BUCK3_FPWM0x01
0x09BUCK3_CTRL2ILIM3[2:0]0x04
0x09BUCK3_CTRL2SLEW_RATE3[2:0]0x05
0x0ABUCK0_VOUTBUCK0_VSET[7:0]0x39
0x0CBUCK1_VOUTBUCK1_VSET[7:0]0x39
0x0EBUCK2_VOUTBUCK2_VSET[7:0]0x39
0x10BUCK3_VOUTBUCK3_VSET[7:0]0x4D
0x12BUCK0_DELAYBUCK0_SHUTDOWN_DELAY[3:0]0x00
0x12BUCK0_DELAYBUCK0_STARTUP_DELAY[3:0]0x00
0x13BUCK1_DELAYBUCK1_SHUTDOWN_DELAY[3:0]0x00
0x13BUCK1_DELAYBUCK1_STARTUP_DELAY[3:0]0x00
0x14BUCK2_DELAYBUCK2_SHUTDOWN_DELAY[3:0]0x00
0x14BUCK2_DELAYBUCK2_STARTUP_DELAY[3:0]0x00
0x15BUCK3_DELAYBUCK3_SHUTDOWN_DELAY[3:0]0x00
0x15BUCK3_DELAYBUCK3_STARTUP_DELAY[3:0]0x00
0x16GPIO2_DELAYGPIO2_SHUTDOWN_DELAY[3:0]0x00
0x16GPIO2_DELAYGPIO2_STARTUP_DELAY[3:0]0x00
0x17GPIO3_DELAYGPIO3_SHUTDOWN_DELAY[3:0]0x00
0x17GPIO3_DELAYGPIO3_STARTUP_DELAY[3:0]0x00
0x19CONFIGDOUBLE_DELAY0x00
0x19CONFIGCLKIN_PD0x01
0x19CONFIGEN4_PD0x00
0x19CONFIGEN3_PD0x01
0x19CONFIGTDIE_WARN_LEVEL0x01
0x19CONFIGEN2_PD0x01
0x19CONFIGEN1_PD0x01
0x21TOP_MASK1GPIO_MASK0x01
0x21TOP_MASK1SYNC_CLK_MASK0x01
0x21TOP_MASK1TDIE_WARN_MASK0x00
0x21TOP_MASK1I_LOAD_READY_MASK0x01
0x22TOP_MASK2RESET_REG_MASK0x01
0x23BUCK_0_1_MASKBUCK1_PG_MASK0x00
0x23BUCK_0_1_MASKBUCK1_ILIM_MASK0x00
0x23BUCK_0_1_MASKBUCK0_PG_MASK0x00
0x23BUCK_0_1_MASKBUCK0_ILIM_MASK0x00
0x24BUCK_2_3_MASKBUCK3_PG_MASK0x00
0x24BUCK_2_3_MASKBUCK3_ILIM_MASK0x00
0x24BUCK_2_3_MASKBUCK2_PG_MASK0x00
0x24BUCK_2_3_MASKBUCK2_ILIM_MASK0x00
0x28PGOOD_CTRL1PG3_SEL[1:0]0x01
0x28PGOOD_CTRL1PG2_SEL[1:0]0x01
0x28PGOOD_CTRL1PG1_SEL[1:0]0x01
0x28PGOOD_CTRL1PG0_SEL[1:0]0x01
0x29PGOOD_CTRL2HALF_DELAY0x00
0x29PGOOD_CTRL2EN_PG0_NINT0x00
0x29PGOOD_CTRL2PGOOD_SET_DELAY0x00
0x29PGOOD_CTRL2EN_PGFLT_STAT0x00
0x29PGOOD_CTRL2PGOOD_WINDOW0x01
0x29PGOOD_CTRL2PGOOD_OD0x00
0x29PGOOD_CTRL2PGOOD_POL0x00
0x2BPLL_CTRLPLL_MODE[1:0]0x00
0x2BPLL_CTRLEXT_CLK_FREQ[4:0]0x01
0x2CPIN_FUNCTIONEN_SPREAD_SPEC0x01
0x2CPIN_FUNCTIONEN_PIN_CTRL_GPIO30x01
0x2CPIN_FUNCTIONEN_PIN_SELECT_GPIO30x00
0x2CPIN_FUNCTIONEN_PIN_CTRL_GPIO20x01
0x2CPIN_FUNCTIONEN_PIN_SELECT_GPIO20x00
0x2CPIN_FUNCTIONGPIO3_SEL0x00
0x2CPIN_FUNCTIONGPIO2_SEL0x00
0x2CPIN_FUNCTIONGPIO1_SEL0x00
0x2DGPIO_CONFIGGPIO3_OD0x01
0x2DGPIO_CONFIGGPIO2_OD0x01
0x2DGPIO_CONFIGGPIO1_OD0x00
0x2DGPIO_CONFIGGPIO3_DIR0x00
0x2DGPIO_CONFIGGPIO2_DIR0x00
0x2DGPIO_CONFIGGPIO1_DIR0x00
0x2FGPIO_OUTGPIO3_OUT0x01
0x2FGPIO_OUTGPIO2_OUT0x01