SPNU118Z September 1995 – March 2023 66AK2E05 , 66AK2H06 , 66AK2H12 , 66AK2H14 , AM1705 , AM1707 , AM1802 , AM1806 , AM1808 , AM1810 , AM5K2E04 , OMAP-L132 , OMAP-L137 , OMAP-L138 , SM470R1B1M-HT , TMS470R1A288 , TMS470R1A384 , TMS470R1A64 , TMS470R1B1M , TMS470R1B512 , TMS470R1B768
The assembler allows you to specify that an operand should be used as an address, an immediate value, an indirect address, a register, a shifted register, or a register list. The following rules apply to the operands of instructions.
Label: ADD R1, R1, #123
; Add 123 (decimal) to the value of R1 and place the result in R1.The offset can be added to or subtracted from the base. The following are examples of instructions that use indirect addresses as operands:
A: LDR R1, [R1]
; Load from address in R1 into R1.
LDR R7, [R1, #5]
; Form address by adding the value in R1 to 5. Load from address into R7.
STR R3, [R1, -R2]
; Form address by subtracting the value in R2 from the value in R1. Store from R3
; to memory at address.
STR R14, [R1, +R3, LSL #2]
; Form address by adding the value in R3 shifted left by 2 to the value in R1.
; Store from R14 to memory at address.
LDR R1, [R1], #5
; Load from address in R1 into R1, then add 5 to the address.
STR R2, [R1], R5
; Store value in R2 in the address in R1, then add the value in R5 to the address.This is an example of an instruction using the write back to register suffix:
LDR R1, [R4, #4]!
; Form address by adding the value in R4 to 4. Load from this address into R1,
; then replace the value in R4 with the address. LDMIA SP, {R4-R11, R15}^
; Load registers R4 through R11 and R15 from memory at SP. Load CPSR with SPSR.| LSL LSR ASL ASR ROR RRX | Logical shift left Logical shift right Arithmetic shift left Arithmetic shift right Rotate right Rotate right extended |
The shift type can be followed by a register or an immediate whose value defines the shift amount. The following are examples of instructions that use shifted registers as operands:
B: ADD R1, R4, R5, LSR R2
; Logical shift right the value in R5 by the value in R2. Add the value in R5 to R4.
; Place result in R1.
LDR R1, [R5, R4, LSL #4]
; Form address by adding the value in R4 shifted left by 4 to the value in R5.
; Load from address into R1.
CMP R3, R4, RRX
; Compare the value in R3 with the value in R4 rotate right extend. LDMEA R2, {R1, R3, R6}
; Pre-decrement stack load. Load registers R1, R3 and R6 from memory at the address in R2.
STMFD R12, {R1, R3-R5}
; Pre-increment stack store. Store from registers R1 and R3 through R5 to memory at the
; address in R12.