SPNU118Z September 1995 – March 2023 66AK2E05 , 66AK2H06 , 66AK2H12 , 66AK2H14 , AM1705 , AM1707 , AM1802 , AM1806 , AM1808 , AM1810 , AM5K2E04 , OMAP-L132 , OMAP-L137 , OMAP-L138 , SM470R1B1M-HT , TMS470R1A288 , TMS470R1A384 , TMS470R1A64 , TMS470R1B1M , TMS470R1B512 , TMS470R1B768
Assemble 16-Bit Instructions (Non-UAL Syntax)
.state16
By default, the assembler begins assembling all instructions in a file as 32-bit instructions. Use the .state16 directive to direct the assembler to begin assembling all instructions at that point as 16-bit instructions. This directive and the .state32 directive allow you to switch between the two assembly modes for non-UAL syntax. If you want to assemble an entire file as 16-bit instructions for V6 and earlier architectures, use the −mt assembler option, which instructs the assembler to begin the assembly process, assembling all instructions as 16-bit instructions.
The .state16 directive performs an implicit halfword alignment before any instructions are written to the section to ensure that all 16-bit instructions are halfword-aligned. The .state16 directive also resets any local labels defined.
In this example, the assembler assembles 16-bit instructions, begins assembling 32-bit instructions, and returns to assembling 16-bit instructions.
1 .global glob1, glob2
2 ****************************************************
3 ** Begin assembling 16-bit instructions. **
4 ****************************************************
5 00000000 .state16
6
7 00000000 4808 LDR r0, glob1_a
8 00000002 4909 LDR r1, glob2_a
9 00000004 6800 LDR r0, [r0]
10 00000006 6809 LDR r1, [r1]
11 00000008 0080 LSL r0, r0, #2
12 0000000a 3156 ADD r1, #56h
13 0000000c 4778 BX pc
14 0000000e 46C0 NOP
15 ****************************************************
16 ** Switch to 32-bit instructions to use the **
17 ** 32-bit state long multiply instruction. **
18 ****************************************************
19 00000010 .state32
20
21 00000010 E0845190 UMULL r5, r4, r0, r1
22 00000014 E28FE001 ADD lr, pc, #1
23 00000018 E12FFF1E BX lr
24 ****************************************************
25 ** Continue assembling 16-bit instructions. **
26 ****************************************************
27 0000001c .state16
28
29 0000001c 1A2D SUB r5, r5, r0
30 0000001e D200 BCS $1
31 00000020 3C01 SUB r4, #1
32 00000022 $1
33 00000024 00000000! glob1_a .word glob1
34 00000028 00000000! glob2_a .word glob2