SPNU118Z September 1995 – March 2023 66AK2E05 , 66AK2H06 , 66AK2H12 , 66AK2H14 , AM1705 , AM1707 , AM1802 , AM1806 , AM1808 , AM1810 , AM5K2E04 , OMAP-L132 , OMAP-L137 , OMAP-L138 , SM470R1B1M-HT , TMS470R1A288 , TMS470R1A384 , TMS470R1A64 , TMS470R1B1M , TMS470R1B512 , TMS470R1B768
The MEMORY and SECTIONS directives provide flexible ways to build, combine, and allocate sections. However, any memory locations or sections you choose not to specify must still be handled by the linker. The linker uses algorithms to build and allocate sections in coordination with any specifications you do supply.
If you do not use the MEMORY and SECTIONS directives, the linker allocates output sections as though the memory map and section definitions shown in Default Allocation for ARM Devices were used.
{
RAM : origin = 0x00000000, length = 0xFFFFFFFF
}
SECTIONS
{
.text : ALIGN(4) {} > RAM
.const: ALIGN(4) {} > RAM
.data : ALIGN(4) {} > RAM
.bss : ALIGN(4) {} > RAM
.cinit: ALIGN(4) {} > RAM /* -c option only */
.pinit: ALIGN(4) {} > RAM /* -c option only */
}See Section 2.5.1 for information about default memory allocation.
All .text input sections are concatenated to form a .text output section in the executable output file, and all .data input sections are combined to form a .data output section.
If you use a SECTIONS directive, the linker performs no part of this default allocation. Instead, allocation is performed according to the rules specified by the SECTIONS directive and the general algorithm described next in Section 8.7.1.