SPNU151W January 1998 – March 2023 66AK2E05 , 66AK2H06 , 66AK2H12 , 66AK2H14 , AM1705 , AM1707 , AM1802 , AM1806 , AM1808 , AM1810 , AM5K2E04 , OMAP-L132 , OMAP-L137 , OMAP-L138 , SM470R1B1M-HT , TMS470R1A288 , TMS470R1A384 , TMS470R1A64 , TMS470R1B1M , TMS470R1B512 , TMS470R1B768
The compiler includes support for generating vector floating-point (VFP) co-processor instructions through the --float_support=vfp option. The VFP co-processor is available in many variants of ARM11 and higher. The valid vfp entries are:
Allows generation of floating point instructions for ARM9E.
Allows generation of floating point instructions for Cortex-A8.
Allows generation of floating point instructions for Cortex-R4.
Allows generation of floating point instructions for Cortex-M4.
Disables hardware floating point support. Specifies that the compiler implements floating point operations in software.
Using the --silicon_version=7M4 command-line option automatically sets the --float_support=fpv4spd16 option. To disable hardware floating point support, use the --float_support=none option.
This is the current support for VFP:
Refer to the ARM architecture manual for more details on the VFPv3 and VFPv3D16 architectures and ISAs. Refer to the ARM AAPCS and EABI documents for more details on VFP calling conventions and build attributes.