SPRABF9 March 2019 TMS320C6742 , TMS320C6742 , TMS320C6746 , TMS320C6746 , TMS320C6748 , TMS320C6748
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Power consumption on the C6748/46/42 device is highly application-dependent, so a spreadsheet is provided to model power consumption for a user's application. To obtain good results from the spreadsheet, realistic usage parameters must be entered. The low-core voltage and other power design optimizations allow these devices to operate with industry-leading performance, while maintaining a low power-to-performance ratio.
The data presented in the accompanying spreadsheet was measured from strong units, representative of devices at the maximum end of power consumption for production units. No production units will have average power consumption that exceeds the spreadsheet values. Therefore, the spreadsheet values may be used for board thermal analysis and power supply design as a maximum long-term average. The power data presented in this document are based on measured data with C6748 silicon revision 2.0 or earlier devices.
Although this spreadsheet was developed for the C6748 devices, it can be used to model power consumption for C6746 and C6742. Features not supported on these devices should not be enabled in the spreadsheet.
Core (V) | DVDD (V) | Configuration | Device Frequency (Mhz) | Junction Temperature (°C) | Total Power (mW) |
---|---|---|---|---|---|
1.0 | 1.8 | Static/Deepsleep | 0 | 25 | 10.93 |
1.2 | 1.8 | Standby Power | 24 | 25 | 36.25 |
1.2 | 1.8 | Typical - 300Mhz | 300 | 25 | 426.93 |
1.3 | 1.8 | Typical - 456Mhz | 456 | 25 | 660.46 |
1.2 | 1.8 | RTC power only | 24 | 25 | 0.02 |
Power consumption for the C6748/46/42 can vary widely depending on the use of on-chip resources. Thus, power consumption cannot be estimated accurately without an understanding of the components of the System-on-Chip (SoC) in use and the usage patterns for those components. By providing the usage parameters that describe how and what on the SoC is being used, accurate consumption numbers can be obtained for power-supply and thermal analysis.
This model breaks down power consumption into two major components: baseline power and activity power. Using this model, various applications that use the SoC differently can get accurate predictions across the spectrum of possible power consumption on the C6748/46/42.
Baseline power consumption is power that is independent of chip activity such as static power (leakage), phase-locked loop (PLL), oscillator power and clock tree power to various subsystem components (SCR) that cannot be turned off via the on-chip power management module. While independent of chip activity, baseline power is dependent on the device operating frequency, voltage, and temperature. Therefore, you can affect baseline power only by changing the PLL(s) output frequency, the core voltage, or the operating temperature.