SPRACK2A September   2019  – March 2020 TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1

 

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3.5.1.2 PLL

The PLL blocks of F28004x and F28002x devices are different. Table 6 lists the PLL features for both devices for comparison. For more information, see the TMS320F28002x microcontrollers technical reference manual (SPRUIN7).

Table 6. PLL Features

Feature F28004x F28002x
VCO Range 120 - 400 MHz 220 - 500 MHz
PLL Raw Clock Range 15 - 200 MHz 6 - 200 MHz
X1 Input Range (PLL enabled) 2 - 20 MHz 2 - 25 MHz
REFCLK Divider No Yes [1..32]
PLL Slip Detect Yes No (use DCC)
Fractional PLLMULT Yes No

Due to the PLL differences between the two devices, TI recommends to use the PLL set up function, SysCtrl_setClock() in C2000Ware to ensure proper PLL setting.