SPRACP6 December 2019 TMS320F2800132 , TMS320F2800133 , TMS320F2800135 , TMS320F2800137 , TMS320F2800152-Q1 , TMS320F2800153-Q1 , TMS320F2800154-Q1 , TMS320F2800155 , TMS320F2800155-Q1 , TMS320F2800156-Q1 , TMS320F2800157 , TMS320F2800157-Q1 , TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1
This application report provides several suggestions on maximizing the GPIO resources on the device to limit the need for IO expanders. Most of the content in this report is catered towards the TMS320F28004x series but can be adapted for other C2000 real-time controllers.
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With the integration trend of microcontrollers, new C2000 devices now provide more analog peripherals, which reduce the system level cost and design effort. The F28004x device incorporates on-chip analog-to-digital converters (ADCs), buffered digital-to-analog converters (DACs), programmable gain amplifiers (PGAs), and comparator subsystems (CMPSS). However, the addition of all this extra analog along with their required pins has led to the reduction in the number of GPIOs. This document explores several options on how to maximize usage of GPIOs.
On every reset, the device executes a boot sequence in ROM depending on the boot mode configuration. By default, the boot ROM uses two boot control GPIO pins to determine the boot mode configuration. Table 1 shows the default boot mode options of the F28004x device.
Boot Mode | GPIO24 (default boot mode select pin 1) | GPIO32 (default boot mode select pin 0) |
---|---|---|
Parallel IO | 0 | 0 |
SCI/Wait boot | 0 | 1 |
CAN | 1 | 0 |
Flash | 1 | 1 |
There are two ways the boot control GPIO pins can be re-purposed for use in an application:
By using weak pull-ups on the boot control GPIO pins, the device will always boot to Flash boot mode. However, after boot completion, the boot control GPIO pins can be configured for application use. When utilizing this approach, the internal pull-ups should not be enabled on these GPIOs. It is recommended to use pull-up resistors in the range of 16.5 kΩ to 27.5 kΩ.
NOTE
The boot control GPIO pins should not be driven by anything else while the device is booting as that can influence the mode the device boots into.