SPRACU5C June 2021 – September 2023 AM2431 , AM2432 , AM2434 , AM6411 , AM6412 , AM6421 , AM6422 , AM6441 , AM6442
The baseline drive impedance and ODT settings are derived from the Signal Integrity SI simulations performed on the EVM and SK.
It is recommended to perform simulation for the design as the values could be different based on board design.
To get an overview of the basic system-level board extraction, simulation, and analysis methodologies for high speed LPDDR4 interfaces, refer LPDDR4 Board Design Simulations chapter of the AM62Ax DDR Board Design and Layout Guidelines application note.
The drive strength is adjustable using the DDR Register Configuration Tool on SysConfig.
For more information, see the [FAQ] AM62A7 or AM62A3 Custom board hardware design – Processor DDR Subsystem and Device Register configuration. This is a generic FAQ and can be used for AM64x / AM243x processors.