SPRACV1B February   2022  – January 2024 AM2434 , AM6411 , AM6412 , AM6421 , AM6441 , AM6442

 

  1.   Abstract
  2.   2
  3.   Trademarks
  4. 1Introduction
  5. 2Processor Core Benchmarks
    1. 2.1 Dhrystone
    2. 2.2 Trigonometric Functions
  6. 3Compute and Memory System Benchmarks
    1. 3.1 Memory Bandwidth and Latency
      1. 3.1.1 LMBench
      2. 3.1.2 STREAM
      3. 3.1.3 Cortex-R5 Memory Access Latency
    2. 3.2 CoreMark®-Pro
    3. 3.3 Fast Fourier Transform
    4. 3.4 Cryptographic Benchmarks
  7. 4Application Benchmarks
    1. 4.1 Machine Learning Inference
    2. 4.2 Field Oriented Control (FOC) Loop
    3. 4.3 PCIE to DDR Performance Using BCDMA
      1. 4.3.1 Test Setup
      2. 4.3.2 Result and Observation
    4. 4.4 DDR to DDR Performance Using BCDMA
      1. 4.4.1 Test Setup
      2. 4.4.2 Result and Observation
  8. 5References
  9. 6Revision History

4.3 PCIE to DDR Performance Using BCDMA

AM64x MCU+ SDK contains demo applications for PCIE enablement. It includes sample to code for PCIE benchmark for PCI-End-Point (EP) and PCIE-Root-Complex(RC) pairing of AM64x

Similar way we have DMA examples in MCU+ SDK. UDMA is the generaliced name for the DMA interface, for AM64x and AM243x it uses BCDMA underneath.We have used these as a baseline measurements and optimal settingss to benchamrk minimum read latency and bandwidth of EP-DDR location to RC-DDR location using BCDMA multi-channels over PCIE. PktDMA (used by for example Ethernet) should behave in a very similar manner. Also with AM243x/AM64x either the RC or the EP can initiate the transactions.