SPRACX9 July   2021 DRA829J , DRA829J-Q1 , DRA829V , DRA829V-Q1 , TDA4VM , TDA4VM-Q1

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Jacinto 7 Imaging Subsystem Overview
  3. 2Camera Capture Subsystem
    1. 2.1 MIPI-CSI2
    2. 2.2 The Video Processing Front End
  4. 3The Vision Pre-Processing Accelerator
    1. 3.1 Video Imaging Subsystem (VISS)
    2. 3.2 Lens Distortion Correction (LDC)
    3. 3.3 Multi-Scalar (MSC)
    4. 3.4 Bilateral Noise Filtering (BNF)
    5. 3.5 Software Availability for Camera Sensors
  5. 4Example Use-Cases
    1. 4.1 4x Camera Use-Case With MIPI Aggregator
    2. 4.2 Generic 8-Camera Use-Case
    3. 4.3 ADAS Use Case
  6. 5References

4.1 4x Camera Use-Case With MIPI Aggregator

Figure 4-1 shows high-level block diagram where 4x 2Mpixel @30fps camera inputs are directly connected to TDA4VM using MIPI CSI-2 aggregator and data flow.

Figure 4-1 4x Camera Use-Case With MIPI CSI-2 Aggregator and Data Flow

Table 4-1 summarizes total utilization for this use-case.

Table 4-1 Total Utilization for This Use Case
IP Max Throughput Utilization Utilization (Percentage)
CSI-2 10 Gbits 2.88 Gbits 28.80%
VPAC 720 MP/s 240 MP/x 33.33%