SPRACX9 July   2021 DRA829J , DRA829J-Q1 , DRA829V , DRA829V-Q1 , TDA4VM , TDA4VM-Q1

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Jacinto 7 Imaging Subsystem Overview
  3. 2Camera Capture Subsystem
    1. 2.1 MIPI-CSI2
    2. 2.2 The Video Processing Front End
  4. 3The Vision Pre-Processing Accelerator
    1. 3.1 Video Imaging Subsystem (VISS)
    2. 3.2 Lens Distortion Correction (LDC)
    3. 3.3 Multi-Scalar (MSC)
    4. 3.4 Bilateral Noise Filtering (BNF)
    5. 3.5 Software Availability for Camera Sensors
  5. 4Example Use-Cases
    1. 4.1 4x Camera Use-Case With MIPI Aggregator
    2. 4.2 Generic 8-Camera Use-Case
    3. 4.3 ADAS Use Case
  6. 5References

2.1 MIPI-CSI2

TDA4VM/DRA829 MIPI-CSI2 interface supports following features:

  • 2x MIPI D-PHY with 4 lanes (2.5Gbps/lane)
  • Supports 8 sensors with de-serializer Hubs
  • 2x Camera Adaptation Layer (CAL)
    • Protocol stack for MIPI CSI2
    • Supports all MIPI supported formats
      • RAW/DPCM/YUV
      • RAW 8, 10, 12, 14, 16 bits
        • Companded or linear
      • Concurrent read of pixel stream from SDRAM
    • Real-time priority on I/F port traffic