SPRAD20 March   2022 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1

 

  1.   Trademarks
  2. 1Introduction
  3. 2A Step-by-Step Guide to Running a Traction Inverter
    1. 2.1 Create Real Time Debug Interface
      1. 2.1.1 Confirm CCS Features
      2. 2.1.2 Create Target Configuration File
      3. 2.1.3 Add Serial Command Monitor Software
      4. 2.1.4 Launch Real Time Debug
    2. 2.2 Configure Control Peripheral and ADC Interrupt With Sysconfig
      1. 2.2.1 Generate PWM for Time Reference
      2. 2.2.2 Synchronize ADC Sampling and Interrupt Service Routine
      3. 2.2.3 Configure DMA for Resolver Excitation via DAC
    3. 2.3 Configure Gate Driver Interface With MSPI
      1. 2.3.1 Confirm Control Card Hardware Configuration for Gate Drivers
      2. 2.3.2 Configure MCSPI for UCC5870 Gate Drivers
      3. 2.3.3 Initialize UCC5870 Gate Drivers
    4. 2.4 Get Samples From ADC and Read Samples Via CCS
      1. 2.4.1 Register and Enable Interrupt
      2. 2.4.2 Add Log Code to Read Samples in Graph at Fixed Rate
      3. 2.4.3 Read ADC Samples in Expression and Graph Windows
    5. 2.5 Generate Space Vector PWM and Drive Motor in Open Loop
      1. 2.5.1 Setup SVPWM Generator Inputs
      2. 2.5.2 Read SVPWM Duty Cycles in Graph Window
      3. 2.5.3 Power Up Inverter and Spin Motor in Open Loop
    6. 2.6 Close Current Loop With Mock Speed
      1. 2.6.1 Add Transformations and Read Id-Iq in Open Loop
      2. 2.6.2 Add Controllers to Close Current Loop
      3. 2.6.3 Read Id-Iq to Close Current Loop
    7. 2.7 Add Software Resolver to Digital Converter
      1. 2.7.1 Generate Excitation for Resolver Hardware
      2. 2.7.2 Add Resolver Software
      3. 2.7.3 Read Resolver Software Outputs
    8. 2.8 Close Speed Loop With Rotor Speed
      1. 2.8.1 Add Speed Loop Controllers
      2. 2.8.2 Add Speed Loop Demo Program
      3. 2.8.3 Read Motor Speed from Graph Window
  4. 3A Brief Guide to Code Migration
    1. 3.1 SoC Architecture Overview
    2. 3.2 SDK Resources Overview
    3. 3.3 Code Migration From AM24
    4. 3.4 Code Migration From C28
  5. 4Summary
  6. 5References

3.1 SoC Architecture Overview

An overview of SoC architecture is presented in Figure 3-1. The SoC includes 2 clusters of R5F cores, 64-bit bus based L2 memory system, 32-bit bus based control and connectivity peripherals. There are also resources to help achieve security and safety features. The R5F clusters can be configured to either dual mode or lock-step mode, which gives opportunity to optimize computation and safety features. The L2 memory system supports many features like on-chip memory, off-chip memory, manipulation of memory, Standard Ethernet, Industrial Ethernet, and security. The control peripherals include all popular features, like PWM with shadow registers and SAR-ADC synchronized with PWM. The connectivity peripherals offer commonly used I2C, SPI, CAN, LIN, and UART.

Figure 3-1 AM263x Block Diagram