SPRAD24 august   2023 AM2631 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1 , AM263P4 , AM263P4-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 Key System Specifications
  5. 2AM263x Overview
    1. 2.1 AM263x Control Card and Traction System Framework
  6. 3Guide to Running TIDM-02014 Traction Inverter
    1. 3.1 Software Set-up
      1. 3.1.1 Code Composer Studio Project
      2. 3.1.2 Software Structure
    2. 3.2 Create Real Time Debug Interface
      1. 3.2.1 Confirm CCS Features
      2. 3.2.2 Create Target Configuration File
      3. 3.2.3 Add Serial Command Monitor Software
      4. 3.2.4 Launch Real Time Debug
    3. 3.3 Running the Code
      1. 3.3.1 Project Setup
      2. 3.3.2 Running the Application
    4. 3.4 Get Samples From ADC and Read Samples Through CCS
      1. 3.4.1 Register and Enable Interrupt
      2. 3.4.2 Add Log Code to Read Samples in Graph at Fixed Rate
      3. 3.4.3 Read ADC Samples in Expression and Graph Windows
    5. 3.5 Generate Space Vector PWM and Drive Motor in Open Loop
      1. 3.5.1 Setup SVPWM Generator Inputs
      2. 3.5.2 Read SVPWM Duty Cycles in Graph Window
      3. 3.5.3 Power Up Inverter and Spin Motor in Open Loop
    6. 3.6 Close Current Loop With Mock Speed
      1. 3.6.1 Add Transformations and Read Id-Iq in Open Loop
      2. 3.6.2 Add Controllers to Close Current Loop
      3. 3.6.3 Read Id-Iq to Close Current Loop
    7. 3.7 Add Software Resolver to Digital Converter
      1. 3.7.1 Generate Excitation for Resolver Hardware
      2. 3.7.2 Add Resolver Software
      3. 3.7.3 Read Resolver Software Outputs
  7. 4Brief Guide to Code Migration
    1. 4.1 SDK Resources Overview
    2. 4.2 Code Migration From C28
    3. 4.3 Code Migration From AM24
  8. 5Summary
  9. 6References

2 AM263x Overview

AM263x is a system on chip (SoC) with Arm®Cortex®-R5F clusters and a dedicated accelerator for real time control. The clusters can be configured as either dual core mode or lockstep mode. The accelerator is named as control subsystem and includes interface modules like ADC, DAC, and PWM. This document describes how one R5F core and the group of interface modules required for one traction inverter power stage can be set-up and the control of the power stage implemented with the reference design TIDM-02014. More details of the SoC can be found in the AM263x Sitara™ Microcontrollers data sheet and the AM263x Sitara Processors Technical Reference Manual. Details of the inverter hardware can be found in the design guide of the Automotive, High-Power, High-Performance SiC Traction Inverter Reference Design.

The Arm® Cortex®-R5F cluster includes two R5F cores accompanying memories like L1 cache and tightly-coupled memories (TCM), standard Arm CoreSight™ debug and trace architecture, integrated vectored interrupt manager (VIM), ECC aggregates, and various other modules for protocol conversion and address translation for easy integration into the SoC. More detailed block diagram can be found in AM263x technical reference manual. The key to real time control with AM263x is to understand the impacts from cache and TCM. Instructions and data can be allocated to either On-Chip RAM or TCM by link command file when program is built. During execution, frequently used instructions and data in On-Chip RAM will be taken into cache automatically. As a result, execution time is significantly improved. But, the data in On-Chip RAM is not updated until it is written back from cache. When data is in cache, the only way to access it is via instructions running in the core. The memory view from integrated development environments (IDE) like Code Composer Studio™ (CCS) will not be able to read it. However, there is a way to read cache with CCS via a section of program operating universal asynchronous receiver/transmitter (UART) inside the core. Details on the UART method is discussed in detail in this application note: AM263x for Traction Inverters. On the other hand, instructions and data allocated to TCM are kept at the address and available to memory view all the time. Generally, execution time of program in cache and TCM is quite fast, but that of program in on-Chip RAM is much slower. Also, the operation of transferring the program from on-Chip RAM to cache takes some time and introduces some non-predictive latency. If this latency is significant to the requirements of the application, it is highly recommended to store the application program in TCM. Details on TCM address can be found in AM263x technical reference manual. In this example, the interrupt program for field oriented control and software resolver to digital converter are located in TCM. The link command file is available as an example in CCS project folder.

The accelerator for real time control inherits Texas Instruments classic C2000 control modules widely used around the world. It includes Analog-to-Digital Converter (ADC), Analog Comparator, Buffered Digital-to-Analog Converter, Enhanced Pulse Width Modulator (EPWM), Enhanced Capture, Enhanced Quadrature Encoder Pulse, Fast Serial Interface, Sigma Delta Filter Module, and Crossbar. Details of these modules are available in AM263x technical reference manual. Configuring these modules can be done using an intuitive system configuration tool, SYSCONFIG, with reduced exposure to implementation details. AM263x Software Development Kit (SDK) provides details of the SYSCONFIG tool. The key for module synchronization is in configuring PWM synchronization input/output in EPWM Time Base section and ADC Start-of-Conversion (SOC) trigger in EPWM Event-Trigger section. Time Base is for aligning multiple PWM channels while Event-Trigger is to synchronize features like ADC, DMA and Interrupt. One example for traction inverter is located in CCS project folder of traction inverter demo. In this example, one PWM channel is set to trigger updates for resolver excitation signal via DMA and DAC at higher frequency, and three PWM channels are used to create inverter signal and generate ADC SOC. In this way, resolver excitation signal from DAC is aligned to the desired phase for ADC samples. As multiple ADC units can share the same SOC, multiple samples can be taken simultaneously across multiple ADC units. Within one ADC unit, the sequence of samples can be configured in SOC Configuration section, and ADC interrupt can be set in INT Configuration. The interrupt can be triggered either at the start of one ADC conversion or at the end of one ADC conversion. Some simple examples on PWM and ADC are available in AM263x SDK under \examples\drivers\epwm and \examples\drivers\adc. More details on the APIs can be found in AM263x SDK below \source\drivers. The header files have more details in comments.