The block diagrams showcase two
supported MSPM0L1xxx designs for stepper motors in the MSPM0L1xxx Stepper SDK:
- 4-PWM control (PWM
interface)
- 1-PWM control (STEP
interface)
As shown in Figure 4-4, the signals used in 4-PWM control (PWM interface) are:
- 4 PWM signals with edge-aligned
synchronization (PWM 4x)
- 8-bit DAC reference voltage for
current regulation (VREF)(1)
- Logic-low fault signal from
driver (nFAULT)
- Gate driver shutoff signal
(DRVOFF)
- Low-power mode signal for drivers
with sleep mode pin (nSLEEP)
- ADC current sense feedback from
integrated current sense to measure motor phase currents
(1) VREF available using 8-bit
DAC from COMP module, available in MSPM0L130x only.
As shown in
Figure 4-5, the signals used in 1-PWM Control (STEP interface) are:
- 1-PWM signal with adjustable duty
cycle and pulse width (STEP)
- Direction pin (DIR)
- 8-bit DAC reference voltage for
current regulation (VREF)
- Logic-low fault signal from
driver (nFAULT)
- Gate driver shutoff signal
(DRVOFF)
- Low-power mode signal for drivers
with sleep mode pin (nSLEEP)
- Optional SPI read/write interface
(for drivers with SPI interface)