SPRAD51A December   2023  – April 2024 F29H850TU , F29H859TU-Q1 , TMS320F2800157 , TMS320F280039 , TMS320F280039-Q1 , TMS320F280039C , TMS320F280039C-Q1 , TMS320F28P659DK-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Programming Fundamentals
  6. 3ROM Bootloader and Hex Utility Usage
  7. 4DCAN Flash Kernel
    1. 4.1 Implementation
      1. 4.1.1 Custom Flash Bank and Sector Erase
      2. 4.1.2 Application Load
  8. 5MCAN Flash Kernel
    1. 5.1 Implementation
      1. 5.1.1 Custom Flash Bank and Sector Erase
      2. 5.1.2 Application Load
  9. 6Example Implementation
    1. 6.1 Device Setup
      1. 6.1.1 Flash Kernels
      2. 6.1.2 Hardware
    2. 6.2 Host Application: dcan_flash_programmer
      1. 6.2.1 Overview
      2. 6.2.2 Building and Running dcan_flash_programmer Using Visual Studio
      3. 6.2.3 Running dcan_flash_programmer for F28003x
      4. 6.2.4 Using the Project With DCAN Bootloader
      5. 6.2.5 Using the Project With CCS
    3. 6.3 Host Application: can_flash_programmer [MCAN]
      1. 6.3.1 Overview
      2. 6.3.2 Building and Running can_flash_programmer Using Visual Studio
      3. 6.3.3 Running can_flash_programmer for F28003x
      4. 6.3.4 Using the Project With MCAN Bootloader
      5. 6.3.5 Using the Project With CCS
    4. 6.4 Application Load: CPU2 Image
      1. 6.4.1 Combining Two Images (.txt)
  10. 7Troubleshooting
    1. 7.1 General
    2. 7.2 DCAN Boot
    3. 7.3 MCAN Boot
  11. 8References
  12. 9Revision History

Using the Project With CCS

  1. In CCS, import and build the CPU1 kernel project.
  2. Launch the target configuration file.
  3. Connect to CPU1.
  4. Load the gel file provided in the project folder to the project. Right click on CPU1 in the target configuration and select "Open GEL Files View".
  5. In the "GEL Files" tab, click on GEL Files. Right click in the "Script" window and select "Load GEL...". Navigate to the project folder and load the gel file.
  6. In emulation mode, the following memory locations need to be set to enable CAN boot mode:
    1. Location 0xD00 with 0xFFFF
    2. Location 0xD01 with 0x5AFF
    3. Location 0xD04 with 0x00XX where XX is the boot mode for CAN Boot – 0x02, 0x22, 0x42 or 0x62. The SENDTEST CAN Boot modes of 0x82, 0xA2, 0xC2 and 0xE2 use the same pins as the first four configurations, respectively, and they also send out two CAN frames. In evaluation mode, using one of the SENDTEST modes ensures that the CAN module does not time out before the host starts sending the flash kernel over. To learn more about the SENDTEST modes, consult the DCAN boot source file located in C2000Ware (C2000Ware_x_xx_xx_xx > driverlib > f28003x > examples > flash > DCAN_Boot.c).

Figure 6-3 shows an example implementation of these memory locations. Once these locations have been programmed, reset the device and click resume. The F28003x device should now be waiting in CAN boot mode in ROM.

 Example Memory Window in CCS
                    (GPIO pins 4/5, CAN Boot Mode) Figure 6-3 Example Memory Window in CCS (GPIO pins 4/5, CAN Boot Mode)

The PEAK CAN analyzer needs to be connected to the PC as well. No initialization needs to be done beforehand.