SPRADC4 june   2023 AM62A3 , AM62A3-Q1 , AM62A7 , AM62A7-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2AM62A Processor
  6. 3Vision Pre-processing Accelerator (VPAC)
    1. 3.1 Vision Imaging Sub-System (VISS)
    2. 3.2 Lens Distortion Correction (LDC) Block
    3. 3.3 Multi-Scalar (MSC) Block
  7. 4Deep Learning Acceleration
  8. 5Camera Mirror System Data Flow and Latency
  9. 6End-to-End Functional Safety
  10. 7Example Demonstration
    1. 7.1 Hardware Equipment
    2. 7.2 Software Components
    3. 7.3 Latency Measurement
    4. 7.4 Future Improvement on Latency
  11. 8Summary
  12. 9References

7 Example Demonstration

An example demonstration was built to showcase the capabilities of AM62A SoC for camera mirror applications. In this demonstration, raw video data is captured from a camera, processed on the AM62A SoC, and then sent to a display. The camera is connected to the AM62A SoC through a FAKRA cable to simulate the real use case where the camera is placed away from the processor.